Integrated test cell

• US 6,310,486 B1
• Filed: 10/01/1999
• Issued: 10/30/2001
• Est. Priority Date: 10/01/1999
• Status: Expired due to Term

• Current Assignee: Teradyne Incorporated
• Original Assignee: Teradyne Incorporated
• Inventors: Trevisan, David, Blagdan, Isreal, LeColst, A. E., Trudeau, Paul, Caradonna, Michael A.
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): Nguyen, Jimmy
• Application Number:
  US09/410,857
• Time in Patent Office: 760 Days
• Field of Search: 324/158.1, 324/758, 324/754, 324/765, 744/907, 738/659, 738/665, 414/226.1, 414/225, 209/573
• US Class Current: 324/750.25
• CPC Class Codes: G01R 31/2887 involving moving the probe head or the IC under test; docking stations moving single probes G01R1/06705; moving individual probes in multiple probes G01R1/07392

Abstract

A semiconductor tester is disclosed that is adapted for testing semiconductor devices disposed on a handling apparatus. The semiconductor tester includes a tester housing defining a self-supporting frame and formed with an externally accessible opening adapted for receiving the handling apparatus. A test controller is disposed within the housing and carried by the frame. Pin electronics including tester circuitry are responsive to the test controller and proximately coupled thereto and mounted to the frame. A docking apparatus is disposed above the opening and is adapted to couple the tester circuitry to the handling apparatus.

Claims

1. A semiconductor tester adapted for testing semiconductor devices disposed on a handling apparatus, said semiconductor tester including:

a tester housing adapted for resting on a floor and comprising a manipulator-less self-supporting frame and formed with an externally accessible opening, said opening adapted for receiving said handling apparatus;

a test controller disposed within said housing and carried by said frame;

pin electronics including tester circuitry responsive to said test controller and proximately coupled to said test controller and mounted to said manipulator-less self-supporting frame; and

a docking apparatus disposed above said opening and adapted to couple said tester circuitry to said handling apparatus.

2. A semiconductor tester for use with a manipulator-less test system according to claim 1 wherein said docking apparatus includes a probe ring assembly adapted to engage said handling apparatus.

3. A semiconductor tester for use with a manipulator-less test system according to claim 1 wherein said probe ring assembly includes a self-alignment mechanism for aligning said probe ring with said handling apparatus.

4. A semiconductor tester for use with a manipulator-less test system according to claim 1 wherein said self-alignment mechanism includes:

a multi-axis table;

a vertically extending compression bar fixed to said multi-axis table and fastened to said probe ring via a pivot disposed on said ring; and

a handle mounted to said probe ring for manually pivoting said probe ring about said pivot.

5. A semiconductor tester for use with a manipulator-less test system according to claim 1 wherein:

said frame defines a plurality of card-cage modules; and

said pin electronics comprise a plurality of channel cards disposed in spaced-apart relationship in said card-cage modules.

6. A semiconductor tester for use with a manipulator-less test system according to claim 5 wherein:

said frame includes respective first and second base supports, and said opening is formed intermediate said base supports; and

said card-cage modules comprise a pair of card-cages set in opposing spaced-apart relationship above said opening.

7. Automatic test equipment for testing semiconductor devices, said automatic test equipment including:

a handling apparatus adapted for securing said semiconductor devices into testable positions;

a tester housing adapted for resting on a floor and comprising a manipulator-less self-supporting frame and formed with an externally accessible opening, said opening adapted for receiving said handling apparatus;

a test controller disposed within said housing and carried by said fame;

pin electronics including tester circuitry responsive to said test controller and proximately coupled to said test controller and mounted to said manipulator-less self-supporting fame; and

a docking apparatus disposed above said opening and adapted to couple said tester circuitry to said handling apparatus.

8. A manipulator-less test system according to claim 7 wherein said handling apparatus comprises a prober.

9. A manipulator-less test system according to claim 7 wherein said handling apparatus comprises a handler.

10. A manipulator-less test system according to claim 7 and further including:

a cart apparatus adapted to engage said handling apparatus and provide selective slidable ingress and egress of said handling apparatus to and from said opening.

11. A manipulator-less test system according to claim 10 wherein said cart apparatus includes:

respective fore and aft channel supports disposed in parallel relationship;

a pair of lateral side beams fixed to the respective ends of said fore and aft channel supports and cooperating therewith to form a rectangular platform;

a vertically upstanding handle fixed to said fore channel support; and

a plurality of casters disposed beneath said platform to provide selective mobility for said cart.

12. A manipulator-less test system according to claim 11 wherein said casters are configured to effect maneuverability of said cart with a push/pull force of no greater than around twenty-five pounds.

13. A manipulator-less test system according to claim 12 wherein said cart apparatus includes a coarse alignment mechanism or coarsely positioning said handling apparatus within said frame opening.