Reconfigurable test system

• US 6,311,149 B1
• Filed: 01/13/1999
• Issued: 10/30/2001
• Est. Priority Date: 08/18/1997
• Status: Expired due to Term

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Ryan, Arthur, Andrade, Hugo
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): JONES, HUGH M
• Application Number:
  US09/229,695
• Time in Patent Office: 1,021 Days
• Field of Search: 703/21, 703/23
• US Class Current: 703/21
• CPC Class Codes: G06F 11/2294 by remote test
• CPC Class Codes: G06F 11/2733 Test interface between tester and unit under test
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A reconfigurable test system including a host computer coupled to a reconfigurable test instrument. The reconfigurable test instrument includes reconfigurable hardware—i.e. a reconfigurable hardware module with one or more programmable elements such as Field Programmable Gate Arrays for realizing an arbitrary hardware architecture and a reconfigurable front end with programmable transceivers for interfacing with any desired physical medium—and optionally, an embedded processor. A user specifies system features with a software configuration utility which directs a component selector to select a set of software modules and hardware configuration files from a series of libraries. The modules are embedded in a host software driver or downloaded for execution on the embedded CPU. The configuration files are downloaded to the reconfigurable hardware. The entire selection process is performed in real-time and can be changed whenever the user deems necessary. Alternatively, the user may create a graphical program in a graphical programming environment and compile the program into various software modules and configuration files for host execution, embedded processor execution, or programming the reconfigurable hardware.

Claims

1. A reconfigurable test system comprising:

a computer system which includes a host CPU and host memory, wherein the host memory stores a hardware architecture library, a driver component library, a configuration utility, and a software driver, wherein the hardware architecture library comprises a plurality of hardware architecture files, wherein the driver component library comprises a plurality of software driver modules;

an instrument coupled to the computer system, wherein the instrument includes a reconfigurable hardware module, wherein the instrument also includes a reconfigurable front end, wherein the reconfigurable front end includes at least one programmable transceiver;

wherein the host CPU is configured to execute the configuration utility, wherein the configuration utility receives user input to configure the reconfigurable test system, wherein said user input determines selection of a first hardware architecture file from the hardware architecture library, wherein said user input also determines selection of one or more software driver modules to be incorporated into said software driver;

wherein, in response to said user input, the host CPU is operable to download the first hardware architecture file to the reconfigurable hardware module, and wherein the host CPU is further operable to install the selected one or more software driver modules into the software driver to configure the test system;

wherein, in response to said user input, the host CPU is operable to download a front end configuration to the reconfigurable front end, wherein the front end configuration is operable to configure the at least one programmable transceiver.

2. The reconfigurable test system of claim 1, wherein the instrument is operable to be coupled to a unit test (UUT) in order to test the UUT;

wherein different types of UUTs may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of UUTs.

3. The reconfigurable test system of claim 1, wherein each programmable transceiver is coupled to a unit under test (UUT), and wherein each programmable transceiver is further coupled to the reconfigurable hardware module.

4. The reconfigurable test system of claim 3, wherein said front end configuration determines a directionality and line encoding scheme for each of said programmable transceivers.

5. The reconfigurable test system of claim 1, wherein the instrument also includes a local CPU and a local memory;

wherein said user input determines selection of one or more embedded software programs from an embedded software library stored in the host memory;

wherein, in response to said user input, the host CPU is operable to compile said one or more embedded software programs and download the compiled one or more embedded software programs to the local memory for execution by the local CPU.

6. The reconfigurable test system of claim 1, further comprising a graphical programming system for creating a graphical program;

wherein said host CPU is operable (a) to compile a first portion of said graphical program to generate said first hardware architecture file, and (b) to compile a second portion of said graphical program to generate said one or more driver software modules.

7. The reconfigurable test system of claim 1, further comprising a graphical programming system for creating a graphical program, wherein said host CPU is operable to select said hardware architecture file based on a portion of said graphical program.

8. The reconfigurable test system of claim 1,

wherein different types of UUTs having various testing requirements may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of UUTs having said various testing requirements.

9. The reconfigurable test system of claim 1, wherein each of said one or more software driver modules implements one of said different testing requirements.

10. The reconfigurable test system of claim 1,

wherein different types of UUTs having various communication protocols may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of UUTs having said various communication protocols.

11. The reconfigurable test system of claim 10, wherein each of said one or more software driver modules implements a different communication protocol.

12. The reconfigurable test system of claim 10, wherein the configuration utility provides the user with a choice of said various telecommunication protocols;

wherein the choice of said telecommunication protocols determines said selection of said one or more software driver modules to be incorporated into said software driver.

13. The reconfigurable test system of claim 1, wherein the instrument is operable to be coupled to a unit under test (UUT) to test the UUT, wherein the UUT comprises a telecommunication device;

wherein different types of telecommunication devices may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of telecommunication devices.

14. The reconfigurable test system of claim 13,

wherein different types of telecommunication devices having various telecommunication protocols may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of telecommunication devices having said various telecommunication protocols.

15. The reconfigurable test system of claim 1, wherein each of said one or more software driver modules implements a different telecommunication protocol.

16. The reconfigurable test system of claim 15, wherein the configuration utility provides the user with a choice of one or more telecommunication protocols;

wherein the choice of said one or more telecommunication protocols determines said selection of said one or more software driver modules to be incorporated into said software driver.

17. The reconfigurable test system of claim 16, wherein the configuration utility validates compatibility of said one or more telecommunication protocols.

18. The reconfigurable test system of claim 1, wherein each of said plurality of hardware architecture files is operable to configure the instrument with a corresponding hardware architecture.

19. The reconfigurable system of claim 18, wherein said reconfigurable hardware module includes one or more Field Programmable Gate Arrays (FPGAs).

20. The reconfigurable test system of claim 18, wherein each of said plurality of hardware architecture files is operable to configure the instrument with a corresponding I/O channel structure.

21. The reconfigurable test system of claim 18, wherein the configuration utility provides the user with choices of hardware features, wherein said choices of hardware features determine said selection of said hardware architecture file from the hardware architecture library.

22. The reconfigurable test system of claim 21, wherein one of said choice of hardware features comprises a first choice of whether synchronous or asynchronous communication is to be implemented in said reconfigurable hardware module, wherein said first choice determines selection of said first hardware architecture file from the hardware architecture library.

23. The reconfigurable test system of claim 1, wherein the configuration utility is executable to present a graphical user interface (GUI) which displays a plurality of user selectable options.

24. The reconfigurable test system of claim 1, wherein the reconfigurable hardware module includes at least two virtual channel slots, wherein each of said at least two virtual channel slots is configured as part of a serial input channel or serial output channel by said downloaded first hardware architecture file.

25. A method for configuring a reconfigurable test system, wherein the reconfigurable test system includes a host computer and an instrument coupled to the host computer, wherein the instrument is operable to be coupled to a unit under test (UUT), wherein the instrument includes a reconfigurable hardware module, the method comprising:

receiving configuration information from a user;

selecting one or more driver software modules from a software component library in response to said configuration information, wherein said software component library includes protocol driver modules which encode a plurality of telecommunication protocols, wherein said configuration information indicates a selection of a first telecommunication protocol, wherein said selecting one or more driver software modules includes selecting one of said protocol driver modules which corresponds to said first telecommunication protocol;

selecting a hardware architecture file from a hardware architecture library in response to said configuration information;

registering the selected one or more driver software modules into the software driver; and

downloading the selected hardware architecture file to the reconfigurable hardware module;

wherein said registering the selected one or more driver software modules and said downloading the selected hardware architecture file operate to configure the test system.

26. The method of claim 25, further comprising:

coupling a UUT to the instrument, wherein the UUT comprises a telecommunication device;

wherein different types of telecommunication devices may be coupled to the instrument;

wherein the reconfigurable test system is reconfigurable to test said different types of telecommunication devices.

27. The method of claim 25, wherein said configuration information comprises user selections of functional features for said reconfigurable test system, wherein said method further comprises validating compatibility of said user selections.

28. The method of claim 25, further comprising executing test software on the host computer to test the UUT after said registering the selected one or more driver software modules and after said downloading the selected hardware architecture file, wherein said test software performs at least one call to one of said registered driver software modules.

29. The method of claim 25, further comprising:

coupling a new UUT to the instrument;

receiving new configuration information from said user to configure the telecommunication test system for the new UUT;

selecting new one or more driver software modules from the software component library in response to said new configuration information;

selecting a new hardware architecture file from the hardware architecture library in response to said new configuration information;

registering the selected new one or more driver software modules into the software driver; and

downloading the selected new hardware architecture file to the reconfigurable hardware module;

wherein said registering of the selected new one or more driver software modules and said downloading the selected new hardware architecture file operate to configure the reconfigurable test system for the new UUT.

30. The method of claim 25, wherein said receiving said configuration information includes:

displaying a set of available telecommunication protocols;

receiving user input to select one of said available telecommunication protocols.

31. The method of claim 25,

wherein said receiving said configuration information comprises receiving information indicating a specified hardware structure;

wherein the hardware architecture file is selected in response to said specified hardware structure;

wherein said downloading the selected hardware architecture file operates to configure the reconfigurable hardware module with said specified hardware structure.

32. The method of claim 31, wherein said hardware architecture library includes a plurality of hardware architecture files, wherein each of said hardware architecture files is operable to configure the reconfigurable hardware module with a corresponding I/O channel structure.

33. The method of claim 31, wherein said hardware architecture library includes at least one hardware architecture file which is operable to configure the reconfigurable hardware module for synchronous transfer, wherein said hardware architecture library includes at least one hardware architecture file which is operable to configure the reconfigurable hardware module for asynchronous transfer.

34. The method of claim 25, further comprising:

receiving a program;

compiling a first portion of said program to generate said hardware architecture file.

35. The method of claim 34, further comprising:

compiling a second portion of said program to generate said one or more driver software modules.

36. The method of claim 34, wherein said program is a graphical program composed in a graphical programming language.

37. The method of claim 34, further comprising:

compiling a third portion of said program into one or more embedded software programs;

downloading said one or more embedded software programs to local memory on said instrument;

executing said one or more embedded software programs on an embedded CPU residing on said instrument.

38. The method of claim 37, wherein said instrument includes a reconfigurable front end, the method further comprising:

compiling a fourth portion of said program into a front end configuration file;

downloading the front end configuration file to the reconfigurable front end.

39. The method of claim 25, wherein said instrument includes a reconfigurable front end, the method further comprising:

selecting a front end configuration file from a front end configuration library, wherein said front end configuration file corresponds to at least a portion of said configuration information received from the user;

downloading the front end configuration file to the reconfigurable front end.