Optical reader with condensed CMOS circuitry

• US 6,311,895 B1
• Filed: 10/07/1999
• Issued: 11/06/2001
• Est. Priority Date: 08/25/1995
• Status: Expired due to Term

• Current Assignee: PTO (Safe Fleet Holdings LLC)
• Original Assignee: PTO (Safe Fleet Holdings LLC)
• Inventors: Olmstead, Bryan L., Colley, James E.
• Primary Examiner(s): TREMBLAY, MARK STEPHEN
• Application Number:
  US09/414,672
• Time in Patent Office: 761 Days
• Field of Search: 235/439, 235/440, 235/460, 235/462.01, 235/462.41, 235/470, 235/454
• US Class Current: 235/462.41
• CPC Class Codes: G06K 7/10752 Exposure time control
• CPC Class Codes: G06K 7/1093 sensing, after transfer of the image of the data-field to an intermediate store, e.g. storage with cathode ray tube
• CPC Class Codes: H04N 25/40 Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
• CPC Class Codes: H04N 25/533 by using differing integration times for different sensor regions
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

An optical or symbol reader including CMOS circuitry preferably integrated on a single chip. A CMOS optical reader chip comprises a CMOS imaging array having a plurality of pixels each with a dedicated pixel-site circuit. Charge is accumulated at each pixel location transferred upon demand to a common bus. In a preferred embodiment, exposure time of the imaging array is controlled using a feedback loop. One or more exposure control pixels are positioned adjacent to or within the imaging array and receive light along with the imaging array. The charge of the exposure control pixel or pixels is measured against a threshold level, and the amount of time taken to reach the threshold level determines the time exposure of the pixels of the imaging array. CMOS signal processing circuitry is employed which, in combination with the exposure control circuitry, minimizes time-to-read over a large range of light levels, while performing spatially optimal filtering. Clocking cycles and control signals are time-adjusted in accordance with the varying output frequency of the imaging array so as to provide invariant frequency response by the signal processing circuitry. A multi-dimensional CMOS imaging array is also provided having simultaneous pixel exposure with non-destructive readout of the pixel contents.

Claims

1. An optical reader comprising:

a common output bus;

an imaging array comprising a plurality of pixels, each pixel connected to said common output bus and comprising a photo-sensitive element and a pixel circuit connected to said photo-sensitive element;

a plurality of pixel select signals connected to said pixels, one pixel select signal connected to each pixel, for individually selecting a pixel to be read;

a plurality of pixel reset signals connected to said pixels, one pixel reset signal connected to each pixel, for individually resetting a pixel; and

an address generator providing individual access to said pixels according to a programmable pattern;

wherein each pixel is read according to said programmable pattern by individual assertion of the pixel select signal connected to the pixel and individual assertion of the pixel reset signal connected to the pixel.

2. The optical reader of claim 1 wherein said imaging array is fabricated using a CMOS process.

3. The optical reader of claim 1 wherein said imaging array and address generator are located on the same chip substrate.

4. The optical reader of claim 1 wherein assertion of the reset signal for a pixel while the pixel is selected clears an accumulated charge after the pixel is read.

26. The optical reader of claim 1, wherein said photosensitive element for a pixel comprises a photogate of a first transistor, and wherein said pixel circuit comprises:

a second transistor connected between said photogate and a supply voltage level, a gate of said second transistor connected to a pixel reset signal for the pixel; and

a third transistor connected between said first transistor and said common output bus, a gate of said third transistor connected to a pixel select signal for the pixel.

27. The optical reader of claim 1, wherein said photosensitive element for a pixel comprises a photosensitive diode, and wherein said pixel circuit comprises:

a first transistor connected to a supply voltage level, a gate of said first transistor connected to a first terminal of said photosensitive diode;

a second transistor connected between a second terminal of said photosensitive diode and said supply voltage level, a gate of said second transistor connected to a pixel reset signal for the pixel; and

a third transistor connected between said first transistor and said common output bus, a gate of said third transistor connected to a pixel select signal for the pixel.

28. The optical reader of claim 1 wherein each pixel is read by assertion of the pixel select signal connected to the pixel followed immediately by assertion of the pixel reset signal connected to the pixel while the pixel is individually selected.

5. An integrated optical reader circuit comprising:

an imaging array fabricated using a CMOS process and located on a CMOS chip having a chip substrate, said imaging array comprising a plurality of individually accessible pixels;

a plurality of pixel select signal lines and pixel reset signal lines for sequentially reading and clearing said pixels, one pixel select signal line and one pixel reset signal line for each pixel, whereby a pixel is read upon assertion of its corresponding pixel select signal line and reset upon assertion of its corresponding pixel reset signal line;

an imaging array output signal connected to said imaging array; and

a signal processing circuit connected to said imaging array output signal.

6. The integrated optical reader of claim 5 further comprising an address generator whereby pixels may be individually accessed, said address generator and said signal processing circuit each fabricated using a CMOS process and located on said CMOS chip.

7. The integrated optical reader of claim 5 further comprising a decoder connected to said signal processing circuit, said decoder fabricated using a CMOS process and located on said CMOS chip.

8. The integrated optical reader of claim 5 wherein said imaging array comprises a multi-dimensional pattern of pixels.

9. A method for optically reading images, comprising the steps of:

receiving light at a plurality of imaging pixels arranged in a two-dimensional pattern, and accumulating a charge individually at each imaging pixel in response thereto;

generating a sequence of pixel addresses according to a prearranged pattern independent of the physical sequence of imaging pixels in said two-dimensional pattern;

reading out an amount of accumulated charge, and therefore the amount of light collected, from each of said imaging pixels in the prearranged pattern, by transferring the accumulated charge to a common output bus, each imaging pixel being read in response to the generation of its pixel address; and

resetting the accumulated charge at each pixel immediately after reading out its accumulated charge;

wherein said step of reading out said amount of accumulated charge, and therefore the amount of light collected, from each of said imaging pixels in the prearranged pattern comprises the step of asserting a pixel select signal for each imaging pixel to be read, and wherein said step of resetting the accumulated charge at each pixel immediately after reading out its accumulated charge comprises the step of asserting a pixel reset signal for the imaging pixel just read while said pixel select signal remains asserted and prior to reading the next imaging pixel in the prearranged pattern.

10. The method of claim 9, further comprising the step of calculating, for each imaging pixel, a difference between voltages corresponding to the accumulated charge at the imaging pixel when its pixel select signal is asserted and any accumulated charge remaining at the imaging pixel when its pixel reset signal is asserted.

11. An optical reader comprising:

a common output bus;

a pattern of imaging pixels dispersed over a two-dimensional region, said pattern having less than the number of imaging pixels required to cover the entirety of said two-dimensional region, each imaging pixel connected to said common output bus;

a plurality of pixel select signals connected to said imaging pixels, for selecting an imaging pixel to be read; and

an address generator having a plurality of output lines connected to said imaging pixels, said address generator providing individual, random access to said imaging pixels in multi-directional patterns.

12. The optical reader of claim 11, wherein said pattern comprises a sparse array of imaging pixels.

13. An optical reader comprising:

a common output bus;

a pattern of imaging pixels dispersed over a two-dimensional region, each imaging pixel connected to said common output bus;

a plurality of pixel select lines connected to said imaging pixels, each pixel select line connected to a different pixel; and

an address generator connected to said pixel select lines, said address generator providing individual access to said imaging pixels by selective assertion of said pixel select lines.

14. The optical reader of claim 13, wherein said pattern comprises a sparse array of imaging pixels.

15. The optical reader of claim 13, wherein one or more of said imaging pixels can be read out non-distinctively.

16. The optical reader of claim 15, further comprising a common reset signal connected to a plurality of said imaging pixels.

17. The optical reader of claim 15, further comprising a plurality of reset signals connected to said imaging pixels, each reset signal connected to a different imaging pixel.

18. The optical reader of claim 13, wherein each imaging pixel comprises a photosensitive element, and wherein each pixel select line is connected to a transistor located at the imaging pixel corresponding to said pixel select line, said transistor forming an electrical path between said photosensitive element and said common output bus when the pixel select line is asserted.

19. The optical reader of claim 18, wherein at least one imaging pixel further comprises a local readout gate connected between said transistor and said photosensitive element.

20. The optical reader of claim 19, wherein said local readout gate comprises a second transistor.

21. The optical reader of claim 19, wherein said at least one imaging pixel further comprises a local shutter gate to enable or disable charging of said photosensitive element at said at least one imaging pixel.

22. The optical reader of claim 13, wherein each imaging pixel comprises:

a first transistor having a photogate;

a second transistor connected between said photogate and a supply voltage level, a gate of said second transistor connected to a pixel reset signal; and

a third transistor connected between said first transistor and said common output bus, a gate of said third transistor connected to the pixel select line for the pixel.

23. The optical reader of claim 13, wherein each imaging pixel comprises:

a photosensitive diode;

a first transistor connected to a supply voltage level, a gate of said first transistor connected to a first terminal of said photosensitive diode;

a second transistor connected between a second terminal of said photosensitive diode and said supply voltage level, a gate of said second transistor connected to a pixel reset signal; and

a third transistor connected between said first transistor and said common output bus, a gate of said third transistor connected to the pixel select line for the pixel.

24. An optical reader comprising:

a common output bus;

a pattern of imaging pixels dispersed over a two-dimensional region, each imaging pixel comprising a photosensitive element and being connected to said common output bus;

a plurality of pixel select lines connected to said imaging pixels, each pixel select line connected to a different pixel; and

an address generator connected to said pixel select lines, said address generator providing individual access to said imaging pixels by selective assertion of said pixel select lines;

wherein at least one of said imaging pixels comprises a local transfer register for storing charge accumulated by the photosensitive element of said at least one imaging pixel, whereby the accumulated charge may be read out multiple times from said imaging pixel.

25. The optical reader of claim 24, wherein said at least one imaging pixel comprises a local shutter gate for enabling and disabling the accumulation of charge by the photosensitive element of said at least one imaging pixel.