Constant power snapshot microemitter array with integral digital interface, isolated substrate current return, and linearized signal response

• US 6,316,777 B1
• Filed: 04/02/1999
• Issued: 11/13/2001
• Est. Priority Date: 04/02/1999
• Status: Expired due to Term

• Current Assignee: FLIR Systems, Inc. (Teledyne Technologies Incorporated)
• Original Assignee: Indigo Systems Corporation (Telecom Eireann)
• Inventors: Hoelter, Theodore R., Parrish, William J., Aziz, Naseem Y., Heath, Jeffrey L.
• Primary Examiner(s): Anderson, Bruce C.
• Application Number:
  US09/285,509
• Time in Patent Office: 956 Days
• Field of Search: 250/495.1, 250/493.1, 250/494.1
• US Class Current: 250/495.1
• CPC Class Codes: H04N 25/671 for non-uniformity detection or correction
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20
• CPC Class Codes: H10N 19/00 Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00

Abstract

A dual sample-and-hold architecture in each unit cell of a read-in-integrated-circuit (RIIC) provides maximum frame rate without frame overlap. Analog pixel signals are updated sequentially in one sample-and-hold capacitor, while an emitter element displays a pixel of a display frame in response to a stored analog signal voltage on an isolated second sample-and-hold capacitor. After all unit cells are updated, the signals on the two capacitors are combined, updating all emitter elements for the next frame. A voltage mode amplifier as an emitter driver provides a more nearly linear dependence of infrared power output on signal voltage than do previous transconductance amplifiers. A digital to analog converter (DAC) on the RIIC substrate results in a simplified interface to the RIIC and in an increased immunity to noise. A constant current source in the unit cell provides constant power dissipation and temperature, independent from variations in emitter element current, improving stability and scene dependent crosstalk. Emitter element current returns to an external ground plane through semiconductor substrate contacts for all unit cells. This configuration eliminates metal interconnects, which produce scene-dependent voltage drops in the return circuit, adversely affecting linearity and crosstalk.

Claims

1. A method of displaying a dynamic infrared image from a two-dimensional array of electrically resistive infrared emitter elements, comprising the acts of:

generating a first electrical current in response to a corresponding stored analog signal voltage at each said emitter element;

passing each said first electrical current through a corresponding emitter element to an electrical ground terminal during a first frame time;

dissipating an electrical power in response to said first electrical current in said emitter element, such that said emitter element emits a pixel of a first display frame of said infrared image; and

updating said stored analog signal voltage, such that said analog signal voltages for all of said emitter elements of said two-dimensional array are updated together within a time duration less than said first frame time.

2. The method of claim 1, wherein said electrical power dissipated in said emitter element is substantially proportional to the second power of said corresponding stored analog signal voltage.

3. The method of claim 1, further comprising the act of providing a difference electrical current bypassing said emitter element, such that the sum of said first electrical current and said difference electrical current is substantially constant, independent of said first electrical current.

4. The method of claim 1, further comprising the act of passing said first electrical current from each of said emitter elements independently to said electrical ground terminal through a doped semiconductor layer.

5. The method of claim 1, wherein the act of updating said stored analog signal voltage further comprises the act of converting a digital datastream to a stream of said analog pixel signals, said converting occurring on a semiconductor substrate supporting said emitter element.

6. The method of claim 1, wherein said analog signal voltage is coupled with said emitter elements through a read-in-integrated-circuit.

7. The method of claim 1, wherein the act of updating said stored analog signal voltage further comprises the acts of:

delivering an analog pixel signal at each of said emitter elements sequentially during said first frame time until said analog pixel signals have been delivered to all of said emitter elements, during which first frame time each of said analog pixel signals remains electrically isolated from the corresponding stored analog signal voltage for each of said emitter elements; and

combining each of said analog pixel signals into said corresponding stored analog signal voltage within a time period of less than said first frame time for all of said emitter elements of said two-dimensional array, thereby substantially simultaneously updating all of said stored analog signal voltages.

8. The method of claim 7, wherein said combining for all of said emitter elements occurs substantially simultaneously.

9. The method of claim 7, wherein said combining for all of said emitter elements occurs within a time less than 10 microseconds.

10. The method of claim 1, wherein all of said emitter elements are updated substantially simultaneously.

11. The method of claim 1, wherein all of said emitter elements are updated within a time less than 10 microseconds.

12. A method of displaying a dynamic infrared image from a two-dimensional array of electrically resistive infrared emitter elements, comprising the acts of:

generating a first electrical current in response to a corresponding stored analog signal voltage at each said emitter element;

passing each said first electrical current through a corresponding emitter element to an electrical ground terminal during a first frame time;

dissipating an electrical power in response to said first electrical current in said emitter element, said electrical power being substantially proportional to the second power of said corresponding stored analog signal voltage, such that said emitter element emits a pixel of a first display frame of said infrared image; and

updating said stored analog signal voltage with an analog pixel signal.

13. The method of claim 12, further comprising the act of providing a difference electrical current bypassing said emitter element, such that the sum of said first electrical current and said difference electrical current is substantially constant, independent of said first electrical current.

14. The method of claim 12, further comprising the act of passing said first electrical current from each of said emitter elements independently to said electrical ground terminal through a doped semiconductor layer.

15. The method of claim 12, wherein the act of updating said stored analog signal voltage further comprises the act of converting a digital datastream to a stream of said analog pixel signals, said converting occurring on a semiconductor substrate supporting said emitter element.

16. The method of claim 12, wherein said analog signal voltage is coupled with said emitter element through a read-in-integrated-circuit.

17. A method of displaying a dynamic infrared image from a two-dimensional array of electrically resistive infrared emitter elements, comprising the acts of:

generating a first electrical current in response to a stored analog signal voltage at each said emitter element;

passing each said first electrical current through a corresponding emitter element to an electrical ground terminal during a first frame time;

providing a difference electrical current bypassing said emitter element, such that the sum of said first electrical current and said difference electrical current is substantially constant, independent of said first electrical current;

dissipating an electrical power in response to said first electrical current in said emitter element, such that said emitter element emits a pixel of a first display frame of said infrared image; and

updating said stored analog signal voltage with an analog pixel signal.

18. The method of claim 17, further comprising the act of passing said first electrical current from each of said emitter elements independently to said electrical ground terminal through a doped semiconductor layer.

19. The method of claim 17, wherein the act of updating said stored analog signal voltage further comprises the act of converting a digital datastream to a stream of said analog pixel signals, said converting occurring on a semiconductor substrate supporting said emitter element.

20. The method of claim 17, wherein said analog signal voltage is coupled with said emitter element through a read-in-integrated-circuit.

21. A method of displaying a dynamic infrared image from a two-dimensional array of electrically resistive infrared emitter elements, comprising the acts of:

generating a first electrical current in response to a corresponding stored analog signal voltage at each emitter element;

passing each said first electrical current through a corresponding emitter element to an electrical ground terminal through a doped semiconductor layer during a first frame time;

dissipating an electrical power in response to said first electrical current in said emitter element, such that said emitter element emits a pixel of a first display frame of said infrared image; and

updating said stored analog signal voltage with an analog pixel signal.

22. The method of claim 21, wherein the act of updating said stored analog signal voltage further comprises the act of converting a digital datastream to a stream of said analog pixel signals, said converting occurring on a semiconductor substrate supporting said emitter element.

23. The method of claim 21, wherein said analog signal voltage is coupled with said emitter element through a read-in-integrated-circuit.

24. A method of displaying a dynamic infrared image from a two-dimensional array of electrically resistive infrared emitter elements, comprising the acts of:

generating a first electrical current in response to a corresponding stored analog signal voltage at each emitter element;

passing each said first electrical current through a corresponding emitter element to an electrical ground terminal during a first frame time;

dissipating an electrical power in response to said first electrical current in said emitter element, such that said emitter element emits a pixel of a first display frame of said infrared image; and

updating said stored analog signal voltage with an analog pixel signal, wherein the act of updating said stored analog signal voltage further comprises the act of converting a digital datastream to a stream of said analog pixel signals, said converting occurring on a semiconductor substrate supporting said emitter element.

25. The method of claim 24, wherein said analog signal voltage is coupled with said emitter element through a read-in-integrated-circuit.

26. An apparatus containing a two-dimensional array of infrared emitter elements coupled to a read-in-integrated-circuit comprising:

a unit cell for each of said emitter elements, each of said unit cells having a first sample-and-hold capacitor interconnected with a signal interconnect line through a first sample-and-hold switch and interconnected with a second sample-and-hold capacitor through a second sample-and-hold switch; and

said second sample-and-hold capacitor interconnected with said emitter element through an emitter driver, wherein an electrical conductive path connects said emitter element to a circuit ground node.

27. The apparatus of claim 26, wherein said emitter driver is configured as a voltage mode amplifier.

28. The apparatus of claim 26, further comprising an electrical current source in said unit cell interconnected to said circuit ground node along a first current conducting path through said emitter element and along a second current conducting path to said circuit ground node bypassing said emitter element, such that said second current conducting path includes a conducting channel of a biased transistor.

29. The apparatus of claim 28, wherein said electrical current source is a biased transistor.

30. The apparatus of claim 26, wherein said circuit ground node for each of said unit cells is independently interconnected to a system electrical ground terminal through a doped semiconductor layer.

31. The apparatus of claim 26, further comprising a digital to analog converter having an output terminal interconnected with said signal interconnect line, said digital to analog converter and said unit cell being incorporated on a single semiconductor substrate.

32. An apparatus containing a two-dimensional array of infrared emitter elements coupled to a read-in-integrated-circuit, comprising

a unit cell for each of said emitter elements, each of said unit cells having a sample-and-hold capacitor interconnected with a signal interconnect line through a sample-and-hold switch and interconnected with said emitter element through a voltage mode amplifier, wherein an electrical conductive path connects said emitter element to a circuit ground node.

33. The apparatus of claim 32, further comprising an electrical current source in said unit cell interconnected to said circuit ground node along a first current conducting path through said emitter element and along a second current conducting path to said circuit ground node bypassing said emitter element, such that said second current conducting path includes a conducting channel of a biased transistor.

34. The apparatus of claim 32, wherein said circuit ground node for each of said unit cells is independently interconnected to a system electrical ground terminal through a doped semiconductor layer.

35. The apparatus of claim 32, further comprising a digital to analog converter having an output terminal interconnected with said signal interconnect line, said digital to analog converter and said unit cell being incorporated on a single semiconductor substrate.

36. An apparatus containing a two-dimensional array of infrared emitter elements coupled to a read-in-integrated-circuit, comprising:

a unit cell for each of said emitter elements, each of said unit cells having a sample-and-hold capacitor interconnected with a signal interconnect line through a sample-and-hold switch and interconnected with said emitter element through an emitter driver, wherein an electrical conductive path connects said emitter element to a circuit ground node; and

an electrical current source in said unit cell interconnected to said circuit ground node along a first current conducting path through said emitter element and along a second current conducting path to said circuit ground node bypassing said emitter element, such that;

said second current conducting path includes a conducting channel of a based transistor.

37. The apparatus of claim 36, wherein said circuit ground node for each of said unit cells is independently interconnected to a system electrical ground terminal through semiconductor substrate contacts comprising a doped semiconductor layer.

38. The apparatus of claim 36, further comprising a digital to analog converter having an output terminal interconnected with said signal interconnect line, said digital to analog converter and said unit cell being incorporated on a single semiconductor substrate.

39. The apparatus of claim 36, wherein said electrical current source is a biased transistor.

40. An apparatus containing a two-dimensional array of infrared emitter elements coupled to a read-in-integrated-circuit comprising:

a unit cell for each of said emitter elements, each of said unit cells having a sample-and-hold capacitor interconnected with a signal interconnect line through a sample-and-hold switch and interconnected with said emitter element through an emitter driver, wherein an electrical conductive path connects said emitter element to a circuit ground node; and

wherein said circuit ground node for each of said unit cells is independently interconnected to a system electrical ground terminal through a doped semiconductor layer.

41. The apparatus of claim 40, further comprising a digital to analog converter having an output terminal interconnected with said signal interconnect line, said digital to analog converter and said unit cell being incorporated on a single semiconductor substrate.

42. An apparatus containing a two-dimensional array of infrared emitter elements coupled to a read-in-integrated-circuit comprising:

a unit cell for each of said emitter elements, each of said unit cells having a sample-and-hold capacitor interconnected with a signal interconnect line through a sample-and-hold switch and interconnected with said emitter element through an emitter driver; and

a digital to analog converter having an output terminal interconnected with said signal interconnect line, said digital to analog converter and said unit cell being incorporated on a single semiconductor substrate;

wherein an electrical conductive path connects said emitter element to a circuit ground node.