Remote initiation of BIOS console redirection

• US 6,317,798 B1
• Filed: 02/11/1999
• Issued: 11/13/2001
• Est. Priority Date: 02/11/1999
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Graf, John D.
• Primary Examiner(s): Lefkowitz, Sumati
• Application Number:
  US09/248,663
• Time in Patent Office: 1,006 Days
• Field of Search: 710/14, 710/15-19, 710/264, 710/38, 713/310, 713/2, 713/201, 713/100, 709/224, 709/222, 709/221, 709/217-219, 345/355, 714/46, 714/57
• US Class Current: 710/15
• CPC Class Codes: G06F 9/451 Execution arrangements for user interfaces

Abstract

A server management tool which allows remote initialization of BIOS console redirection on a computer system (e.g., server computer). Server computer is coupled to a remote console via an asynchronous connection. Console redirection is initiated by generating a serial break on the asynchronous connection via the remote console. The server computer detects the serial break by a break detect circuit. The break detect circuit then generates a signal which places the CPU of the server computer into system management mode (SMM). After server computer CPU is in SMM, a password and console redirection request are passed to the server computer from the remote console via the asynchronous connection. After the password sent by the remote console has been authenticated by an SMI handler routine within the server computer, the SMM of the CPU processes the redirection request by calling the basic input output system (BIOS) and the SMI handler routine. The serial break within the server computer is cleared after processing the console redirection request.

Claims

1. A computer system communicating with a remote console via an asynchronous connection, wherein the remote console generates a serial break on the asynchronous connection, the computer system comprising:

a register having a first bit and a second bit;

a break detect circuit coupled to the register for detecting the serial break generated by the remote console, and activating a break detect signal in response to the detection, wherein the first bit of the register is set in response to activation of the break detect signal, and wherein the break detect signal is de-activated in response to the second bit of the register being set;

a system management interrupt (SMI) circuit for asserting an SMI signal upon detection of the break detect signal;

a memory for storing a basic input output system (BIOS) and an SMI handler routine for handling console redirection requests; and

a central processing unit (CPU) coupled to the SMI circuit, the register and the memory, wherein the CPU is responsive to the SMI signal being asserted by the SMI circuit, identifies the SMI signal assertion as a remote break by reading the first bit of the register, processes a subsequent console redirection request generated by the remote console by calling the BIOS and the SMI handler routine, and sets the second bit of the register upon completion of the processing of the redirection request.

2. The computer system of claim 1, wherein the computer system further includes a serial port coupled to the asynchronous connection.

3. The computer system of claim 2, wherein the serial port comprises an RS-232serial port.

4. The computer system of claim 2, wherein the computer system farther includes a modem coupled to the serial port.

5. The computer system of claim 4, wherein the computer system firther includes a software application which is configured to answer an incoming call from the remote console via the modem.

6. The computer system of claim 4, wherein the software application is Windows NT Remote Access Server (RAS), available commercially from Microsoft Corporation.

7. The computer system of claim 4, wherein the software application is PC-Anywhere 32, available commercially from Symantec Corporation.

8. The computer system of claim 3, wherein the modem is set to an auto-answer mode.

9. The computer system of claim 2, wherein the computer system further includes a universal asynchronous receiver-transmitter (UART) coupled to the serial port which manages the serial port and handles communications across the asynchronous connection.

10. The computer system of claim 2, wherein the SMI circuit comprises a multiplexer, and wherein the output of the multiplexer switches from an IRQ signal to the SMI signal upon detection of the break detect signal.

11. The computer system of claim 1, wherein the computer system includes a CMOS memory chip having an authorization password for controlling remote access to the BIOS of the computer system from the remote console.

12. The computer system of claim 11, wherein a password entered at the remote console is passed to the computer system, and wherein the entered password is validated against the authorization password prior to processing the console redirection request.

13. A method for enabling remote initiation of basic input output system (BIOS) console redirection on a computer system via an asynchronous connection, the method comprising:

generating a serial break on the asynchronous connection of the computer system;

detecting and processing the serial break, wherein a central processing unit is placed in system management mode (SMM) upon detection of the serial break;

generating a console redirection request on the asynchronous connection of the computer system;

processing the console redirection request at the CPU, wherein the SMM of the CPU calls the BIOS and an SMI handler routine to service the console redirection request; and

clearing the serial break upon the completion of processing of the console redirection request.

14. The method of claim 13, wherein the processing of the console redirection request at the CPU further comprises the steps of:

transmitting a carriage return from the remote console to the CPU, wherein the carriage return generates an SMI password initialization request which is processed by the SMI handler routine.

sending a password prompt from the SMI handler routine to the remote console;

transmitting a password from the remote console to the CPU in response to the password prompt; and

verifying the transmitted password with the SMI handler routine, wherein the SMI handler routine receives each transmitted character of the password and compares the transmitted password with a stored authentication password until a carriage return is received.

15. The method of claim 14, wherein upon three consecutive password verification failures, the SMI handler routine deactivates the break detect signal by setting the second bit of the register.

16. The method of claim 14, wherein upon successful verification of the password, the SMI handler routine sends a second prompt to the remote console describing a set of options for console redirection.

17. The method of claim 16, wherein the set of options for console redirection includes a first option to reset the computer system and enable BIOS console redirection.

18. The method of claim 16, wherein the set of options for console redirection includes a second option to power cycle the computer system and enable BIOS console redirection.

19. The method of claim 16, wherein the set of options for console redirection includes a third option to power off the computer system.

20. A method for enabling remote initiation of basic input output system (BIOS) console redirection on a computer system via an asynchronous connection, the method comprising:

generating a serial break on the asynchronous connection;

detecting the serial break via a break detect circuit, wherein the break detect circuit activates a break detect signal in response to the detection;

setting a first bit of a register coupled to the break detect circuit upon activation of the break detect signal;

asserting a system management interrupt (SMI) signal via an SMI circuit upon detection of the break detect signal;

identifying the asserted SMI signal as a remote break at a central processing unit (CPU) by reading the first bit of the register, wherein the CPU is placed in system management mode (SMM);

generating a console redirection request on the asynchronous connection;

processing the console redirection request at the CPU, wherein the CPU calls the BIOS and an SMI handler routine to service the console redirection request; and

clearing the serial break upon the completion of processing of the console redirection request by setting a second bit of the register.

21. The method of claim 20, wherein the processing of the console redirection request at the CPU further comprises the steps of:

transmitting a carriage return from the remote console to the CPU, wherein the carriage return generates an SMI password initialization request which is processed by the SMI handler routine.

sending a password prompt from the SMI handler routine to the remote console;

transmitting a password from the remote console to the CPU; and

verifying the transmitted password with the SMI handler routine, wherein the SMI handler routine receives the transmitted password and compares the transmitted password with a stored authentication password.

22. The method of claim 21, wherein upon three consecutive password verification failures, the SMI handler routine deactivates the break detect signal by setting the second bit of the register.

23. The method of claim 21, wherein upon successful verification of the password, the SMI handler routine send a second prompt to the remote console describing a set of options for console redirection.

24. The method of claim 23, wherein the set of options for console redirection includes a first option to reset the computer system and enable BIOS console redirection.

25. The method of claim 23, wherein the set of options for console redirection includes a second option to power cycle the computer system and enable BIOS console redirection.

26. The method of claim 23, wherein the set of options for console redirection includes a third option to power off the computer system.