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Digital signal processor containing scalar processor and a plurality of vector processors operating from a single instruction

  • US 6,317,819 B1
  • Filed: 02/24/1999
  • Issued: 11/13/2001
  • Est. Priority Date: 01/11/1996
  • Status: Expired due to Term
First Claim
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1. A digital data processor integrated circuit comprising:

  • a plurality of functionally identical first processor elements; and

    a second processor element;

    wherein said plurality of functionally identical first processor elements are bidirectionally coupled to a cache memory via a crossbar switch, and further comprising circuitry, operable during a single cycle, for performing an N-byte operand cache memory read access or an N-byte operand cache memory write access, where the N-byte operand is on other than an N-byte boundary in said cache memory, where N>

    1.

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