Integrated electronic micromodule and method for making same

• US 6,319,827 B1
• Filed: 03/01/2001
• Issued: 11/20/2001
• Est. Priority Date: 06/29/1998
• Status: Expired due to Term

• Current Assignee: WISeKey Semiconductors
• Original Assignee: Inside Technologies (Verimatrix SA)
• Inventors: Serra, Didier, Bertholio, Frédéric, Kowalski, Jacek
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Zarneke, David A.
• Application Number:
  US09/720,701
• Time in Patent Office: 264 Days
• Field of Search: 438/113, 438/460, 438/622, 438/624, 438/666, 257/678, 257/679, 257/692
• US Class Current: 438/666
• CPC Class Codes: G06K 19/07747 at least one of the integrated circuit chips being mounted as a module
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/0775 arrangements for connecting the integrated circuit to the antenna
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/92244 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 23/49855 for flat-cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H04B 5/263 : Multiple coils at either side

Abstract

An electronic micromodule includes a support wafer, and an integrated circuit chip on the support wafer. The integrated circuit chip includes electrical connector areas, and at least one insulation layer is on the support wafer and the integrated circuit chip. The insulation layer includes openings to the electrical connector areas. At least one flat winding defining a coil is on the insulation layer and is connected to the electrical connector areas. A conducting material is in in each of the openings through the insulation layer for connecting the coil to the electrical zconnector areas.

Claims

1. A method for making at least one electronic micromodule comprising a support wafer and an integrated circuit chip thereon, the integrated circuit chip comprising a plurality of electrical connector areas and at least one coil connected to the plurality of electrical connector areas, the method comprising:

attaching the integrated circuit chip to the support wafer;

forming at least one insulation layer on the support wafer and the integrated circuit chip;

forming a plurality of openings through the at least one insulation layer to the plurality of electrical connector areas;

forming at least one winding defining a coil on the at least one insulation layer; and

connecting the coil to the plurality of electrical connector areas.

2. A method according to claim 1, wherein making the at least one electronic micromodule comprises making a plurality of electronic micromodules, and wherein the method further comprises cutting the support wafer to separate the plurality of electronic micromodules from one another.

3. A method according to claim 1, wherein connecting the coil to the plurality of electrical connector areas comprises depositing a conducting material in the plurality of openings.

4. A method according to claim 3, wherein the coil comprises the same conducting material deposited in the plurality of openings.

5. A method according to claim 1, wherein forming the at least one insulation layer comprises forming a first insulation layer and a second insulation layer with a conducting layer therebetween, and wherein the coil is defined on the second insulation layer.

6. A method according to claim 1, wherein the support wafer comprises silicon, and wherein forming the at least one insulation layer comprises forming a polyimide layer and forming a silicon dioxide layer on the polyimide layer.

7. A method according to claim 1, wherein forming the at least one winding to define the coil comprises:

electroplating copper on the at least one insulation layer; and

etching there copper to define the coil.

8. A method according to claim 1, further comprising depositing a protective material on the support wafer, the coil and the integrated circuit chip.

9. An electronic micromodule comprising:

a support wafer;

an integrated circuit chip on said support wafer, said integrated circuit chip comprising a plurality of electrical connector areas;

at least one insulation layer on said support wafer and said integrated circuit chip, said at least one insulation layer including a plurality of openings to said plurality of electrical connector areas; and

at least one winding defining a coil on said at least one insulation layer and being connected to said plurality of electrical connector areas.

10. An electronic micromodule according to claim 9, further comprising a conducting material in each of the plurality of openings through said at least one insulation layer, wherein said conducting material connects said coil to said plurality of electrical connector areas.

11. An electronic micromodule according to claim 9, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer with a conductor therebetween for connecting said coil to said plurality of electrical connector areas.

12. An electronic micromodule according to claim 9, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer, and wherein said at least one winding defining the coil comprises a first winding defining a first coil on said first insulation layer and a second winding defining a second coil on said second insulation layer.

13. An electronic micromodule according to claim 9, wherein said support wafer comprises silicon and said at least one insulation layer comprises a polyimide layer and a silicon dioxide layer on said polyimide layer.

14. A hybrid electronic micromodule comprising:

a support wafer comprising a plurality of contact pads on a front side thereof;

an electronic micromodule on a rear side of said support wafer and comprising

an integrated circuit chip comprising a plurality of electrical connector areas,

at least one insulation layer on the rear side of said support wafer and said integrated circuit chip, said at least one insulation layer including a plurality of first openings to said plurality of electrical connector areas and a plurality of second openings to said plurality of contact pads, and

at least one winding defining a coil on said at least one insulation layer and being connected to said plurality of electrical connector areas via said plurality of first opening,

said electronic micromodule having a contact operating mode via said plurality of contact pads, and a contactless operating mode via said coil.

15. A hybrid electronic micromodule according to claim 14, further comprising a conducting material in each of the plurality of first and second openings through said at least one insulation layer, and wherein said conducting material connects said coil to said plurality of electrical connector areas.

16. A hybrid electronic micromodule according to claim 14, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer with a conductor therebetween for connecting said coil to said plurality of electrical connector areas.

17. A hybrid electronic micromodule according to claim 14, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer, and wherein said at least one winding defining the coil comprises a first winding defining a first coil on said first insulation layer and a second winding defining a second coil on said second insulation layer.

18. A hybrid electronic micromodule according to claim 17, wherein said support wafer comprises silicon and said at least one insulation layer comprises a polyimide layer and a silicon dioxide layer on the polyimide layer.

19. A contactless integrated circuit comprising:

an electronic micromodule comprising

a support wafer;

an integrated circuit chip on said support wafer, said integrated circuit chip comprising a plurality of electrical connector areas;

at least one insulation layer on said support wafer and said integrated circuit chip, said at least one insulation layer including a plurality of openings to said plurality of electrical connector areas; and

at least one winding defining an antenna circuit on said at least one insulation layer and being connected to said plurality of electrical connector areas;

a demodulator connected to said antenna circuit for reception of digital data;

a modulator connected to said antenna circuit for transmission of the digital data; and

a processor connected to said demodulator and to said modulator.

20. A contactless integrated circuit according to claim 19, wherein said demodulator and said modulator are connected in parallel to said antenna circuit.

21. A contactless integrated circuit according to claim 19, further comprising a memory connected to said processor.

22. A contactless integrated circuit according to claim 19, further comprising a diode bridge connected in parallel to said antenna circuit for adjusting a voltage being applied to said electronic micromodule.

23. A contactless integrated circuit according to claim 19, further comprising a conducting material in each of the plurality of openings through said at least one insulation layer, wherein said conducting material connects said antenna circuit to said plurality of electrical connector areas.

24. A contactless integrated circuit according to claim 19, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer with a conductor therebetween for connecting said antenna circuit to said plurality of electrical connector areas.

25. A contactless integrated circuit according to claim 19, wherein said at least one insulation layer comprises a first insulation layer and a second insulation layer, and wherein said at least one winding defining an antenna circuit comprises a first winding defining a first antenna circuit on said first insulation layer and a second winding defining a second antenna circuit on said second insulation layer.

26. A contactless integrated circuit according to claim 19, wherein said support wafer comprises silicon and said at least one insulation layer comprises a polyimide layer and a silicon dioxide layer on said polyimide layer.