Semiconductor device

• US 6,320,229 B1
• Filed: 04/29/1999
• Issued: 11/20/2001
• Est. Priority Date: 05/18/1998
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Corporation (Panasonic Holdings Corporation)
• Inventors: Yamamoto, Akihiro, Uchikoba, Toshitaka, Sakagami, Masahiko
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Luu, Chuong A
• Application Number:
  US09/301,354
• Time in Patent Office: 936 Days
• Field of Search: 257/355, 257/358, 257/360-363, 257/357, 257/359, 257/296, 257/372, 257/173, 257/174
• US Class Current: 257/355
• CPC Class Codes: H01L 23/62 Protection against overvoltage, e.g. fuses, shunts
• CPC Class Codes: H01L 27/0288 using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

In a semiconductor substrate of a first conductivity type, first and second high-concentration layers of a second conductivity type are formed in spaced relation to each other. A reference voltage is applied to the second high-concentration layer. A conductive layer provides an electrical connection between the first high-concentration layer and an input pad for inputting an input signal to an input circuit or input/output circuit. A first low-concentration layer of the second conductivity type is formed in the region of the semiconductor substrate immediately underlying the first high-concentration layer.

Claims

1. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a first high-concentration layer of a second conductivity type formed in said semiconductor substrate;

a second high-concentration layer of the second conductivity type formed in said semiconductor substrate in spaced relation to said first high-concentration layer, a reference voltage being applied to said second high-concentration layer;

a conductive layer for providing an electrical connection between said first high-concentration layer and an input pad for inputting an input signal to an input circuit or to an input/output circuit;

a first low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said first high-concentration layer; and

a high-resistance conductive layer formed between said input pad and said first high-concentration layer to be connected in series with said conductive layer, said high-resistance conductive layer having a resistance value higher than that of said conductive layer.

2. The semiconductor device according to claim 1, further comprising a second low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said second high-concentration layer.

3. The semiconductor device according to claim 2, further comprising:

a third high-concentration layer of the second conductivity type formed in a region of said semiconductor substrate on the opposite side of said second high-concentration layer relative to said first high-concentration layer, the reference voltage being applied to said third high-concentration layer; and

a third low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said third high-concentration layer.

4. The semiconductor device according to claim 1, further comprising an impurity diffusion layer of the second conductivity type formed in a region of said semiconductor substrate surrounding said first and second high-concentration layers, a voltage higher than the reference voltage being applied to said impurity diffusion layer.

5. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a first high-concentration layer of a second conductivity type formed in said semiconductor substrate;

a second high-concentration layer of the second conductivity type formed in said semiconductor substrate in spaced relation to said first high-concentration layer, a reference voltage being applied to said second high-concentration layer;

a conductive layer for providing an electrical connection between said first high-concentration layer and an input pad for inputting an input signal to an input circuit or to an input/output circuit; and

a first low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said first high-concentration layer,

wherein said first high-concentration layer has a non-opposing region extending outwardly from a region thereof in opposing relation to said second high-concentration layer, said non-opposing region being electrically connected to said conductive layer.

6. The semiconductor device according to claim 5, further comprising a second low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said second high-concentration layer.

7. The semiconductor device according to claim 6, further comprising:

a third high-concentration layer of the second conductivity type formed in a region of said semiconductor substrate on the opposite side of said second high-concentration layer relative to said first high-concentration layer, the reference voltage being applied to said third high-concentration layer; and

a third low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said third high-concentration layer.

8. The semiconductor device according to claim 5, further comprising an impurity diffusion layer of the second conductivity type formed in a region of said semiconductor substrate surrounding said first and second high-concentration layers, a voltage higher than the reference voltage being applied to said impurity diffusion layer.

9. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a first high-concentration layer of a second conductivity type formed in said semiconductor substrate;

a second high-concentration layer of the second conductivity type formed in said semiconductor substrate in spaced relation to said first high-concentration layer, a reference voltage being applied to said second high-concentration layer;

a conductive layer for providing an electrical connection between said first high-concentration layer and an input pad for inputting an input signal to an input circuit or to an input/output circuit;

a first low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said first high-concentration layer; and

a fourth high-concentration layer of the first conductivity type formed in a region of said semiconductor substrate surrounding said first and second high-concentration layers, a reference voltage being applied to said fourth high-concentration layer.

10. The semiconductor device according to claim 9, further comprising a second low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said second high-concentration layer.

11. The semiconductor device according to claim 10, further comprising:

a third high-concentration layer of the second conductivity type formed in a region of said semiconductor substrate on the opposite side of said second high-concentration layer relative to said first high-concentration layer, the reference voltage being applied to said third high-concentration layer; and

a third low-concentration layer of the second conductivity type formed in a region of said semiconductor substrate immediately underlying said third high-concentration layer.

12. The semiconductor device according to claim 9, further comprising an impurity diffusion layer of the second conductivity type formed in a region of said semiconductor substrate surrounding said first and second high-concentration layers, a voltage higher than the reference voltage being applied to said impurity diffusion layer.