Power supply pulse width modulation (PWM) control system
First Claim
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1. A power supply pulse width modulation (PWM) control system comprising:
- a differential amplifier system having, a voltage control signal (VC) input, a current sense (VS) signal input and a signal output, the differential amplifier system operational to generate an output signal proportional to a difference between a current sense signal and a control voltage signal;
a capacitive PWM memory element;
a PWM memory set element operational in response to a PWM system clock signal to charge the capacitive PWM memory element;
a PWM memory discharge element operational in response to the differential amplifier system output signal to discharge the capacitive PWM memory element and to generate an analog PWM signal therefrom; and
a digital converter operational in response to the analog PWM signal to generate a digital PWM output signal therefrom.
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Abstract
A power supply pulse width modulation (PWM) control system uses peak current program mode (CPM) control for large duty ratios with a smooth transition to voltage mode control at small duty ratios down to zero duty ratio. The PWM control system implements the latch function in an analog, circuit in contrast with commonly employed digital solutions, further resulting in low delay times since it does not have logic and set-up delays that are associated with latches.
52 Citations
33 Claims
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1. A power supply pulse width modulation (PWM) control system comprising:
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a differential amplifier system having, a voltage control signal (VC) input, a current sense (VS) signal input and a signal output, the differential amplifier system operational to generate an output signal proportional to a difference between a current sense signal and a control voltage signal;
a capacitive PWM memory element;
a PWM memory set element operational in response to a PWM system clock signal to charge the capacitive PWM memory element;
a PWM memory discharge element operational in response to the differential amplifier system output signal to discharge the capacitive PWM memory element and to generate an analog PWM signal therefrom; and
a digital converter operational in response to the analog PWM signal to generate a digital PWM output signal therefrom. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A power supply PWM control system comprising:
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a first differential stage responsive to a voltage control signal (VC) to generate a Voltage Mode Control signal, a second differential stage responsive to a current sense (VS) signal to generate a Current Program Mode Control signal;
a third differential stage in communication with the first differential stage and operational to establish a threshold for the voltage control signal associated with the first differential stage;
a capacitive PWM memory device;
a PWM memory set device operational in response to a PWM system clock signal to charge the capacitive PWM memory device;
a PWM memory discharge device operational in response to the first and second differential stage Control signals such that the capacitive PWM memory device can be discharged to generate an analog PWM signal therefrom and further such that the power supply PWM control system can transition between Current Program Mode Control and Voltage Mode Control; and
a digital converter operational in response to the analog PWM signal to generate a digital PWM output signal therefrom. - View Dependent Claims (19, 20, 21, 22)
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23. A power supply pulse width modulation (PWM) control system comprising:
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a differential amplifier system having a voltage control signal (VC) input, a current sense (VS) signal input and a signal output, the differential amplifier system operational to generate an output signal controlled by a current sense signal and a control voltage signal;
an analog latch;
a latch set element operational in response to a PWM system clock signal to set the analog latch;
a latch reset element operational in response to the differential amplifier system output signal to reset the analog latch and to generate an analog, PWM signal therefrom; and
a digital converter operational in response to the analog PWM signal to generate a digital PWM output signal therefrom. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification