Interconnect structure of semiconductor device

• US 6,323,556 B2
• Filed: 11/16/1999
• Issued: 11/27/2001
• Est. Priority Date: 11/17/1998
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Izumi, Katsuya
• Primary Examiner(s): Lee, Eddie
• Assistant Examiner(s): CRUZ, LOURDES C
• Application Number:
  US09/440,710
• Publication Number:
  US 20010011775A1
• Time in Patent Office: 742 Days
• Field of Search: 257/758, 257/48, 257/750, 257/784, 174/262
• US Class Current: 257/758
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An interconnect structure of a semiconductor device comprising: a semiconductor substrate; a plurality of interconnects including a subject interconnect; a plurality of interlayer dielectric films disposed between the adjacent interconnects; and a concave or convex portion formed on the surface of the semiconductor device corresponding to the desired portion of the subject interconnect is disclosed. When some deficiency is generated on the subject interconnect, the deficiency can be detected by measuring the corresponding concave or convex portion on the surface of the semiconductor for prompt inspection because the concave or convex portion is connected to the subject interconnect.

Claims

1. A semiconductor device allowing easy inspection of an interconnect, said semiconductor device comprising:

a semiconductor substrate;

a plurality of interconnect layers overlying said semiconductor substrate having a plurality of individual interconnects therein, including a top interconnect layer, wherein at least one of said plurality of interconnect layers contains an interconnect to be inspected;

a plurality of interlayer dielectric films each disposed between adjacent two of said plurality of interconnect layers;

a top dielectric film disposed on said top interconnect layer; and

a dummy interconnect, said dummy interconnect comprising an inspection pad disposed on one of said interlayer dielectric films adjacent to but not connected with any interconnects in a corresponding interconnect layer and overlying said interconnect to be inspected, and an extension part connected between said inspection pad and said interconnect to be inspected but not connected to any other intervening interconnect.

2. The semiconductor device as defined in claim 1, wherein said top dielectric film has a convex or concave portion disposed substantially above said inspection pad.

3. The semiconductor device as defined in claim 1, wherein said inspection pad and said top interconnect layer are formed as a common layer.

4. The semiconductor device as defined in claim 1, wherein said extension part includes a relay pad disposed on one of said interlayer dielectric films adjacent to but unconnected with any interconnects in a corresponding interconnect layer;

between said inspection pad and said interconnect to be inspected.

5. The semiconductor device as defined in claim 4, further comprising an extended portion of the interconnect to be inspected, said extended portion for connecting said interconnect to be inspected to said extension part.

6. A semiconductor device allowing easy inspection of an interconnect, said semiconductor device comprising:

a semiconductor substrate;

a plurality of interconnect layers overlying said semiconductor substrate having a plurality of individual interconnects therein, including a top interconnect layer, wherein said plurality of interconnect layers includes a plurality of interconnects to be inspected;

a plurality of interlayer dielectric films each disposed between adjacent two of said plurality of interconnect layers;

a top dielectric film disposed on said top interconnect layer; and

a plurality of dummy interconnects, each said dummy interconnect comprising an inspection pad connected to a corresponding one of said plurality of interconnects to be inspected and a corresponding extension part penetrating said dielectric films, wherein each of said inspection pads of said dummy interconnects is disposed on one of said plurality of interlayer dielectric films adjacent to said top dielectric film and adjacent to but not connected with any interconnects in a corresponding interconnect layer, and said corresponding extension part is not connected to any other intervening interconnect.

7. The semiconductor device as defined in claim 6, wherein said corresponding extension part includes a relay pad disposed on one of said interlayer dielectric films adjacent to but unconnected with any interconnect in a conesponding interconnect layer.

8. A semiconductor device allowing easy inspection of a subject interconnect of an interconnect structure, said semiconductor device comprising:

an undercoat dielectric film;

a plurality of interconnect layers overlying said undercoat dielectric film having a plurality of individual interconnects therein, including a top interconnect layer;

a plurality of interlayer dielectric films each disposed between respective interconnect layers of said plurality of interconnect layers, including a top dielectric film disposed on said top interconnect layer;

a dummy interconnect connected to a subject interconnect, wherein said subject interconnect is part of one of said plurality of interconnect layers, said dummy interconnect extends upward toward said top interconnect layer through said dielectric films from said subject interconnect for allowing simplified testing of the subject interconnect, and said dummy interconnect is not connected with any other interconnects in any intervening interconnect layer.

9. The semiconductor device according to claim 8, wherein said dummy interconnect comprises, an inspection pad disposed on one of said interlayer dielectric films located above said subject interconnect adjacent to but unconnected with any interconnects in a corresponding interconnection layer, and a conductive plug connectively extending from said inspection pad down to said subject interconnect.

10. The semiconductor device according to claim 8, wherein said conductive plug comprises at least two plug segments, and at least one relay pad connected between said at least two plug segments, wherein said relay pad is disposed on one of said interlayer dielectric films, adjacent to but unconnected with any interconnects in a corresponding interconnection layer, between said inspection pad and said subject interconnect.

11. The semiconductor device according to claim 9, further comprising:

an extension part integrally fomcd with, and in a same plane as, the subject interconnect, wherein said extension part is connected to said conductive plug.

12. The semiconductor device according to claim 10, further comprising:

an extension part integrally formed with, and in a same plane as, the subject interconnect, wherein said extension part is connected to a bottom one of said at least two plug segments.

13. The semiconductor device according to claim 9, wherein said top dielectric film has a convex or concave portion disposed above said subject interconnect for identifying a location of said subject interconnect.

14. The semiconductor device according to claim 10, wherein said top dielectric film has a convex or concave portion disposed above said subject interconnect for identifying a location of said subject interconnect.