Comparator with controllable bias current source

• US 6,323,695 B1
• Filed: 09/10/1999
• Issued: 11/27/2001
• Est. Priority Date: 09/11/1998
• Status: Expired due to Term

• Current Assignee: STMicroelectronics GmbH (STMicroelectronics NV)
• Original Assignee: STMicroelectronics GmbH (STMicroelectronics NV)
• Inventors: Heinrich, Peter
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): NGUYEN, LINH M
• Application Number:
  US09/393,127
• Time in Patent Office: 809 Days
• Field of Search: 327/77, 327/87, 327/89, 327/65, 327/66, 327/52, 327/53, 327/560, 327/561, 327/562, 327/563, 327/78, 327/56, 327/74, 330/253, 330/257, 330/261
• US Class Current: 327/89
• CPC Class Codes: H03F 3/45076 characterised by the way of implementation of the active amplifying circuit in the differential amplifier
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

A comparator having a differential amplifier with a signal input to receive an input signal and a reference input to receive a reference voltage, and having a controllable bias current source for supplying to the differential amplifier a bias current that has a low quiescent current or a higher active current as a function of whether the input signal is constant or variable. The controllable bias current source is further configured to adjust the bias current in accordance with the rate of change of the input signal.

Claims

1. A comparator, comprising:

a differential amplifier with a signal input to receive an input signal and a reference input to receive a reference voltage, and

a controllable bias current source for supplying to the differential amplifier a bias current that has a low quiescent current level or a higher active current level as a function of whether the input signal is constant or variable, respectively, the bias current source comprising a constant current source supplying a constant quiescent current, and an additional current source comprising a controllable current source and a capacitor connected between the signal input and a control input of the controllable bias current source, the additional current source supplying an additional current, the level of which depends on the rate of the input signal variation.

2. The comparator of claim 1 wherein the differential amplifier has a bias current terminal to which an output terminal of the constant current source and art output terminal of the additional current source are connected.

3. The comparator of claim 1 wherein the additional current source comprises:

a first capacitor and a first controllable current source that supplies an additional current only upon an input signal varying in a positive direction; and

a second capacitor and a second controllable current source that supplies additional current only upon an input signal varying in a negative direction.

4. The comparator of claim 3 wherein each controllable current source has a current mirror connected between the capacitor and the bias current terminal for mirroring a, capacitor current supplied thereto from the capacitor to the bias current terminal.

5. The comparator of claim 3 wherein the first controllable current source has two series-connected current mirrors, a first current mirror coupled with the first capacitor being disposed on a low potential side of a supply voltage source, and a second current mirror coupled with the bias current terminal on a high potential side thereof, and wherein the second controllable current source has a third current mirror disposed on the high potential, side of the supply voltage source and connected between the second capacitor and the bias current terminal.

6. The comparator of claim 1 wherein the differential amplifier has a differential stage with two differential stage transistors that are connected between a high potential side current mirror and a low potential side current mirror, one of which has as current mirror branch into which a current can be fed that depends on the bias current supplied by the controllable bias current source.

7. A comparator, comprising:

first and second transistors each having a first terminal connected to a high potential side current mirror, a second terminal connected to a low-potential-side current mirror, the first transistor having a first control terminal coupled to an input signal source, the second transistor having a second control terminal coupled to a reference voltage source;

a first current source having an output coupled to the low-potential-side current mirror and configured to provide a predetermnined bias current when the input signal is in a steady state; and

a second and third current sources, each having an input coupled to the input signal source and an output coupled to the low-potential-side current mirror, each of the first and second current sources configured to provide an additional bias current in response to changes in the input signal.

8. The comparator of claim 7 wherein the first and second current sources are configured to provide an additional bias current the level of which depends on the rate of change of the input signal.

9. The comparator of claim 7 wherein the second current source is configured to provide an additional bias current when the input signal changes in a negative direction, and the third current source is configured to supply an additional bias current when the input signal changes in a positive direction.

10. The comparator of claim 8 wherein the second and third current sources each comprise a capacitive element coupled to the input signal source and a current mirror device coupled in series between the capacitive element and the low-potential-side current mirror, the second and third current sources configured to mirror the capacitive currents of their respective capacitive elements.

11. The comparator of claim 10 wherein the current mirror device of the third current source comprises a pair of series-connected current mirrors, the first series-connected current mirror is coupled to a high-potential-side of a supply voltage source and the second series-connected current mirror is coupled to a low-potential-side of a supply voltage source.

12. A method for biasing a comparator, comprising:

receiving an input signal at a controllable bias current source; and

supplying a bias current at a predetermined level when the input signal is not changing; and

supplying a first additional bias current from a second current source when the input signal is changing in a positive direction and supplying a second additional bias current from a third bias current source when the input signal is changing in a negative direction.

13. The method of claim 12 wherein supplying an additional bias current comprises supplying an additional bias current the level of which depends on the rate of change of the input signal.

14. The method of claim 12 wherein supplying a bias current at a predetermined level comprises supplying a bias current at a predetermined low level from a first current source when the input signal is not changing.

15. A comparator, comprising:

a differential amplifier with a signal input to receive an input signal and a reference input to receive a reference voltage; and

a controllable bias current source for supplying to the differential amplifier a bias current that has a low quiescent current level or a higher active current level as a function of whether the input signal is constant or variable, the controllable bias current source comprising a constant current source supplying a constant quiescent current, and an additional current source supplying an additional current only during times of input signal variation, the additional current having a level that depends on the rate of the input signal variation, the additional current source comprising a controllable current source and a capacitor connected between the signal input and a control input of the controllable bias current source.

16. The comparator of claim 15 wherein the additional current source comprises:

a first capacitor and a first controllable current source that supplies an additional current only upon an input signal varying in a positive direction; and

a second capacitor and a second controllable current source that supplies additional current only upon an input signal varying in a negative direction.

17. The comparator of claim 16 wherein each controllable current source has a current mirror connected between the capacitor and the bias current terminal for mirroring a capacitor current supplied thereto from the capacitor to the bias current terminal.

18. The comparator of claim 16 wherein the first controllable current source has two series-connected current mirrors, a first current mirror coupled with the first capacitor being disposed on a low potential side of a supply voltage source, and a second current mirror coupled with the bias current terminal on a high potential side thereof, and wherein the second controllable current source has a third current mirror disposed on the high potential side of the supply voltage source and connected between the second capacitor and the bias current terminal.

19. A method for biasing a comparator, comprising:

receiving an input signal at a controllable bias current source; and

supplying a bias current to a differential amplifier in response to the input signal, the bias current increasing when the input signal is changing, wherein supplying an additional bias current comprises supplying a first additional bias current from a first current source when the input signal is changing in a positive direction and supplying a second additional bias current from a second bias current source when the input signal is changing in a negative direction.