Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors

• US 6,323,735 B1
• Filed: 05/25/2000
• Issued: 11/27/2001
• Est. Priority Date: 05/25/2000
• Status: Expired due to Term

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Pavelka, John B., Healy, Edmund G., Welland, David R.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US09/579,151
• Time in Patent Office: 551 Days
• Field of Search: 331/36.L, 331/181, 257/531, 257/690, 438/238, 438/329
• US Class Current: 331/36.00L
• CPC Class Codes: H01L 2223/6611 Wire connections
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/199 : with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Abstract

A method and apparatus for synthesizing high-frequency signals that overcomes integration problems while meeting demanding phase noise and other impurity requirements. In one embodiment, on-package oscillator circuit inductors are provided for band selection purposes, with no external package connection to connect off-package or external inductors to on-package inductance circuits. Multiple package electrical connection points may also be provided on-package to allow for selection of alternate oscillator inductance values during package assembly.

Claims

1. A semiconductor package comprising:

a package substrate having a first surface;

an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry; and

at least one inductance circuit formed entirely within said semiconductor package and formed at least partially between said integrated circuit and said package substrate, the inductance circuit at least in part determining an output frequency for the frequency synthesizer circuitry;

wherein said frequency synthesizer circuitry has an output frequency selectably operable within a plurality of bands, and wherein said at least one inductance circuit forms part of a controlled oscillator circuit within said frequency synthesizer circuitry, the output frequency being dependent upon the controlled oscillator circuit.

2. The semiconductor package of claim 1, wherein said frequency synthesizer circuitry comprises a phase locked loop circuit.

3. The semiconductor package of claim 1, wherein said controlled oscillator circuit within said frequency synthesizer circuitry is selectably operable within said plurality of frequency bands.

4. The semiconductor package of claim 3, wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.

11. The semiconductor package of claim 3, further comprising a plurality of substrate electrical contacts disposed on said first surface of said package substrate;

and

wherein the controlled oscillator circuit has a plurality of selectable inductance circuits having different inductance values, the selectable inductance circuits allowing for the oscillator circuit to be operable in the plurality of frequency bands; and

wherein each of said plurality of selectable inductance circuits is formed by first and second conductive features electrically coupled between said integrated circuit and one or more of said substrate electrical contacts to form an electrically conductive path.

12. The semiconductor package of claim 11, wherein said package is provided with alternative substrate electrical contacts corresponding to each of said inductance circuits to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of each said inductance circuits, the inductance value of each of said inductance circuits being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.

13. The semiconductor package of claim 12, wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative substrate bonding pads spaced at variable distances from said integrated circuit;

and wherein said first and second conductive features of each inductance circuit comprise first and second wire bonds electrically connected to a selected one of said alternative substrate bonding pads to form an electrically conductive path having a first inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.

14. The semiconductor package of claim 12, wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of each inductance circuit comprise first and second solder bumps positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.

15. The semiconductor package of claim 12, wherein said alternative substrate electrical contacts corresponding to each of said inductance circuits comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of each inductance circuit comprise first and second wire bonds positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.

16. The semiconductor package of claim 12, wherein said controlled oscillator circuit comprises first and second selectable inductance circuits and a switch coupled to selectively choose either said first or said second selectable inductance circuit for inclusion within said controlled oscillator circuit.

17. The semiconductor package of claim 12, wherein said controlled oscillator circuit comprises first and second selectable inductance circuits and a switch coupled to selectively choose either one or both of said first or second selectable inductance circuits for inclusion within said controlled oscillator circuit.

18. The semiconductor package of claim 17, wherein said switch is coupled so that both of said first and second selectable inductance circuits may be chosen for inclusion within said controlled oscillator circuit in series relationship.

19. The semiconductor package of claim 17, wherein said switch is coupled so that both of said first and second selectable inductance circuits may be chosen for inclusion within said controlled oscillator circuit in parallel relationship.

5. A semiconductor package comprising:

a package substrate having a first surface;

an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry;

at least one inductance circuit formed entirely within said semiconductor package and formed at least partially between said integrated circuit and said package substrate, the inductance circuit at least in part determining an output frequency for the frequency synthesizer circuitry; and

at least one substrate electrical contact disposed on said first surface of said package substrate; and

wherein said inductance circuit is formed by first and second conductive features electrically coupled between said integrated circuit and said at least one substrate electrical contact to form an electrically conductive path.

6. The semiconductor package of claim 5, wherein no external package electrical connection exists to said substrate electrical contact.

7. The semiconductor package of claim 5, wherein said package substrate is provided with at least two alternative substrate electrical contacts corresponding to said inductance circuit to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of said inductance circuit, an inductance value of said inductance circuit being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.

8. The semiconductor package of claim 7, wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative substrate bonding pads spaced at variable distances from said integrated circuit;

and wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds electrically connected to a selected one of said alternative substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.

9. The semiconductor package of claim 7, wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of said inductance circuit comprise first and second solder bumps positioned so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.

10. The semiconductor package of claim 7, wherein said alternative substrate electrical contacts corresponding to said inductance circuit comprise alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.

20. A frequency synthesizer for generating output signals in at least one band of frequency, comprising:

a package substrate having a plurality of substrate electrical contacts disposed on a first surface thereof;

an integrated circuit structurally connected to said first surface of said package substrate and having a plurality of integrated circuit electrical contacts disposed on a surface thereof, said integrated circuit and said package substrate together forming said frequency synthesizer and comprising;

a frequency circuit having an output frequency operable within at least one frequency band; and

a controlled oscillator circuit within a phase locked loop circuit, the controlled oscillator circuit being operable within said at least one frequency band and the output frequency being dependent upon the controlled oscillator circuit;

wherein the controlled oscillator circuit has at least one inductance circuit formed at least partially between said integrated circuit and said package substrate, said inductance circuit being electrically connected to an on-package inductor having an inductance value, the at least one inductance circuit allowing the controlled oscillator circuit to be operable in said at least one frequency band.

21. The frequency synthesizer of claim 20, wherein said at least one inductance circuit is formed by first and second conductive features electrically coupled between two or more of said integrated circuit electrical contacts and one or more of said substrate electrical contacts to form an electrically conductive path;

and wherein said package is provided with at least one of alternative substrate electrical contacts or alternative integrated circuit electrical contacts corresponding to said inductance circuit to provide alternate electrical connection points during package assembly for at least one or both of said first and second conductive features of said inductance circuit, the on-package inductance value of said inductance circuit being dependent on at least one or both of the identity of the alternative substrate electrical contacts, or the identity of the alternative integrated circuit electrical contacts, selected for connection with at least one or both of said first and second conductive features to form said electrically conductive path.

22. The frequency synthesizer of claim 21, wherein no external package connection exists to said alternative substrate contact selected for connection with said first and second conductive features.

23. The frequency synthesizer of claim 21, wherein said frequency circuit comprises a phase locked loop circuit.

24. The frequency synthesizer of claim 23, wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.

25. A method of assembling a semiconductor package, comprising:

providing a package substrate having a plurality of substrate electrical contacts disposed on a first surface thereof;

providing an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry, the package substrate being provided with at least two alternative substrate electrical contacts to provide alternate electrical connection points during package assembly for at least one or both of a first conductive feature and a second conductive feature of a frequency synthesizer inductance circuit formed entirely within said semiconductor package;

selecting at least one of said alternative substrate electrical contacts; and

electrically connecting at least one or both of said first and second conductive features to said selected alternative substrate electrical contact to form said frequency synthesizer inductance circuit, the inductance value of said frequency synthesizer inductance circuit being dependent on the identity of the alternative substrate electrical contact selected for connection with at least one or both of said first and second conductive features.

26. The method of claim 25, wherein said frequency synthesizer circuitry comprises a phase locked loop circuit.

27. The method of claim 25, wherein said frequency synthesizer circuitry has an output frequency operable within a plurality of bands, and wherein said frequency synthesizer inductance circuit forms part of a controlled oscillator circuit within said frequency synthesizer circuitry that is selectably operable within said plurality of frequency bands, the output frequency being dependent upon the controlled oscillator circuit.

28. The semiconductor package of claim 27, wherein said controlled oscillator circuit comprises an LC tank oscillator circuit.

29. The method of claim 25, wherein no external package connection exists to said alternative substrate contact selected for electrical connection with at least one or both of said first and second conductive features.

30. The method of claim 25, wherein said at least two alternative substrate electrical contacts comprise at least two alternative substrate bonding pads spaced at variable distances from said integrated circuit;

wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds; and

wherein said step of electrically connecting comprises electrically connecting both of said first and second wire bonds to a selected one of said alternative substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on at least one of the length of the first and second wire bonds required to span the distance between said selected substrate bonding pad and said integrated circuit, the distance between said first and second wire bonds, or both.

31. The semiconductor package of claim 25, wherein said at least two alternative substrate electrical contacts comprise at least two alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of said inductance circuit comprise first and second solder bumps; and

wherein said step of electrically connecting comprises positioning said first and second conductive features of said inductance circuit so that they are electrically connected to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads.

32. The semiconductor package of claim 25, wherein said at least two alternative substrate electrical contacts corresponding to said inductance circuit comprise at least two alternative pairs of first and second substrate bonding pads positioned at variable locations on or within said package substrate, each of the first and second substrate bonding pads of a bonding pad pair being electrically coupled to one another on or within said package substrate by a third conductive feature;

wherein said first and second conductive features of said inductance circuit comprise first and second wire bonds; and

wherein said step of electrically connecting comprises electrically connecting said first and second wire bonds to a selected respective alternative pair of first and second substrate bonding pads to form an electrically conductive path having an inductance value at least partially dependent on the inductive value of the third conductive feature electrically coupled between said selected pair of first and second substrate bonding pads, the length of the first and second wire bonds required to span the distance between said selected substrate bonding pads and said integrated circuit, or a combination thereof.

33. A semiconductor package comprising:

a package substrate having a first surface;

an integrated circuit electrically connected to said first surface of said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry;

at least one inductance circuit formed entirely within said semiconductor package and formed at least partially between said integrated circuit and said package substrate, the inductance circuit at least in part determining an output frequency for the frequency synthesizer circuitry; and

at least two alternative substrate electrical contacts disposed on said package substrate;

wherein said inductance circuit comprises at least one conductive feature electrically coupled between said integrated circuit and one of said alternative substrate electrical contacts to form an electrically conductive path, an inductance value of said inductance circuit being dependent on the identity of the alternative substrate electrical contact coupled to said at least one conductive feature to form said electrically conductive path.