Liquid crystal display device and process for production thereof

• US 6,323,918 B1
• Filed: 12/08/1997
• Issued: 11/27/2001
• Est. Priority Date: 12/10/1996
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Fujitsu Limited
• Inventors: Morita, Keizo, Yoshioka, Koji, Nakazawa, Mitsuharu, Haraguchi, Munehiro, Itokazu, Masafumi, Murakami, Hiroshi
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): Duong, Tai V.
• Application Number:
  US08/986,913
• Time in Patent Office: 1,450 Days
• Field of Search: 349/38, 349/39, 349/42, 349/43, 349/48, 349/110, 349/111, 349/106, 257/59, 257/72, 345/92, 438/30
• US Class Current: 349/48
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer

Abstract

A capacitor electrode is formed simultaneously with drain bus lines. This capacitor electrode is electrically connected to the contact of two TFT'"'"'s through the medium of a contact hole. Then, an interlayer insulating film is formed on the entire face and a black matrix of such light blocking metal film as Ti is formed on the interlayer insulating film so as to overlie the channel parts and the contacts of the TFT'"'"'s and the capacitor electrode. The capacitor electrode, the interlayer insulating film formed thereon, and the black matrix jointly form a capacitor.

Claims

1. A liquid crystal display device, comprising:

(a) a first substrate being provided including

(1) a first transparent sheet,

(2) a plurality of gate bus lines disposed parallel to each other on said first transparent sheet,

(3) a plurality of drain bus lines formed on said first transparent sheet and adapted to intersect perpendicularly said gate bus lines a second substrate opposed to said first substrate, and a liquid crystal sealed in the gap between said first substrate and said second substrate,

(4) pixel electrodes disposed severally in areas formed on said first transparent sheet as defined by said gate bus lines and said drain bus lines,

(5) a plurality of thin film transistors connected in series between said pixel electrodes and said drain bus lines and adapted to utilize said gate bus lines as gate electrodes,

(6) a first electrode connected electrically to any of connecting parts of sources and drains of said plurality of thin film transistors,

(7) an interlayer insulating film covering said thin film transistors and said first electrode,

(8) a second electrode made of a light blocking metal film and opposed to said first electrode on said interlayer insulating film, and

(9) a black matrix formed to overlie channel parts and the source and drain connecting parts of said plurality of thin film transistors;

(b) a second substrate opposed to said first substrate and being provided including

(1) a second transparent sheet, and

(2) a counter electrode made of a transparent conductor and formed on said second transparent sheet; and

(c) a liquid crystal sealed in the gap between said first substrate and said second substrate.

2. A liquid crystal display device according to claim 1, wherein said first electrode is connected to the source and drain connecting parts of said plurality of thin film transistors.

3. A liquid crystal display device according to claim 1, wherein said first electrode is connected to the drain sides of thin film transistors which are connected to said pixel electrodes.

4. A liquid crystal display device according to claim 1, wherein said second electrode is retained at a fixed potential relative to the voltage applied to said liquid crystal.

5. A liquid crystal display device comprising:

(a) a first substrate being provided including

(1) a first transparent sheet,

(2) a plurality of gate bus lines disposed parallel to each other on said first transparent sheet,

(3) a plurality of drain bus lines formed on said first transparent sheet and adapted to intersect perpendicularly said gate bus lines,

(4) pixel electrodes disposed severally in areas formed on said first transparent sheet as defined by said gate bus lines and said drain bus lines,

(5) a plurality of thin film transistors connected in series between said pixel electrodes and said drain bus lines and adapted to utilize said gate bus lines as gate electrodes,

(6) a first electrode made of a metal and connected electrically to any of sources of said plurality of thin film transistors, and

(7) a second electrode made of a metal film and disposed above or below said first electrode through the medium of an insulating film;

(b) a second substrate opposed to said first substrate and being provided including

(1) a second transparent sheet,

(2) a light blocking metal film covering said gate bus lines and said drain bus lines of said first substrate, and

(3) a counter electrode formed above or below said light blocking metal film through the medium of an insulating film; and

(c) a liquid crystal sealed in the gap between said first substrate and said second substrate.

6. A liquid crystal display device according to claim 5, which further comprises an intermediate electrode formed in the same layer as said drain bus lines and is characterized by said pixel electrode being connected to said thin film transistors through the medium of said intermediate electrode.

7. A liquid crystal display device according to claim 5, wherein said first electrode is formed in either of the layer having said gate bus lines formed therein and the layer having said drain bus lines formed therein and said second electrode is formed in the remainder of said two layers.

8. A liquid crystal display device according to claim 5, wherein the areas defined by said gate bus lines and said drain bus lines are utilized as pixel areas and the size, x, of said pixel areas in the direction of length of said gate bus lines and the size, y, of said pixel areas in the direction of length of said drain bus lines satisfy the expression, x>

y.

9. A liquid crystal display device according to claim 8, wherein three adjacent pixel areas lying in the direction of length of said drain bus lines are utilized as one dot during color display and a red (R) color filter is allocated to one of said three pixel areas, a green (G) color filter is allocated to either of the other two pixel areas, and a blue (B) color filter is allocated to the remaining pixel area.

10. A liquid crystal display device comprising;

(a) a first substrate being provided including

(1) a first transparent sheet,

(2) a plurality of gate bus lines disposed parallel to each other on said first transparent sheet,

(3) a plurality of drain bus lines formed on said first transparent sheet and adapted to intersect perpendicularly said gate bus lines,

(4) pixel electrodes disposed severally in areas formed on said first transparent sheet as defined by said gate bus lines and said drain bus lines,

(5) a plurality of thin film transistors connected in series between said pixel electrodes and said drain bus lines and adapted to utilize said gate bus lines as gate electrodes,

(6) a light blocking metal film covering at least said gate bus lines and said drain bus lines,

(7) a first electrode made of a metal and connected electrically to any of sources of said plurality of thin film transistors, and

(8) a second electrode made of a metal film and disposed above or below said first electrode through the medium of an insulating film;

(b) a second substrate opposed to said first substrate and being provided including

(1) a second transparent sheet, and

(2) a counter electrode made of a transparent conductor and formed on said second transparent sheet; and

(c) a liquid crystal sealed in the gap between said first substrate and said second substrate.

11. A liquid crystal display device according to claim 10, which further comprises an intermediate electrode formed in the same layer as said drain bus lines and is characterized by said pixel electrodes being connected to said thin film transistors through the medium of said intermediate electrode.

12. A liquid crystal display device according to claim 10, wherein said first electrode is formed in any of the three layers, the layer having said gate bus lines formed therein, the layer having said drain bus lines formed therein, and the layer having said light blocking metal film formed therein and said second electrode is formed in either of the remaining two layers.

13. A liquid crystal display device according to claim 10, wherein the areas defined by said gate bus lines and said drain bus lines are utilized as pixel areas and the size, x, of said pixel areas in the direction of length of said gate bus lines and the size, y, of said pixel areas in the direction of length of said drain bus lines satisfy the expression, x>

y.

14. A liquid crystal display device according to claim 13, wherein three adjacent pixel areas lying in the direction of length of said drain bus lines are utilized as one dot during color display and a red (R) color filter is allocated to one of said three pixel areas, a green (G) color filter is allocated to either of the other two pixel areas, and a blue (B) color filter is allocated to the remaining pixel area.

15. A process for the production of a liquid crystal display device, characterized by comprising;

(a) a step of selectively forming a silicon film on a transparent sheet;

(b) a step of forming a gate insulating film on said silicon film;

(c) a step of forming gate bus lines passing said gate insulating film on said transparent sheet;

(d) a step of selectively introducing an impurity into said silicon film thereby forming a plurality of thin film transistors formed of said silicon film, said gate insulating film, and said gate bus lines and connected in series;

(e) a step of forming a first interlayer insulating film covering said thin film transistors on the entire face of said transparent sheet;

(f) a step of selectively forming a first and a second contact hole in said first interlayer insulating film;

(g) a step of forming a conducting film on said first interlayer insulating film and patterning said conductor film thereby forming drain bus lines electrically connected to the transistor on one terminal side in all said plurality of thin film transistors connected in series through the medium of said first contact hole and a first electrode electrically connected to any of connecting parts of sources and drains of said plurality of thin film transistors through the medium of said second contact hole;

(h) a step of forming a second interlayer insulating film covering said drain bus lines and said first electrode on the entire face of said transparent sheet; and

(i) a step of forming a light blocking metal film on said second interlayer insulating film and patterning said light blocking metal film thereby forming a black matrix covering said gate bus lines and said drain bus lines and a second electrode overlying said first electrode.