Method, communication system, phone, and radio transmitter utilizing nonsystematically shortened code encoder and decoder
First Claim
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1. A communication system, comprising:
- a nonsystematically shortened code encoder having an input adapted to receive input digital signals comprising a number of bits, wherein the nonsystematically shortened code encoder is adapted to produce encoded shortened code digital signals in accordance with the input digital signals, wherein the input digital signals do not appear within the encoded shortened code digital signals; and
a nonsystematically shortened code decoder adapted to receive the encoded shortened code digital signals, wherein the nonsystematically shortened code decoder is adapted to produce an estimate of the input digital signals and an error detection flag.
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Abstract
A method 400, phone 203, radio transmitter 205, and communication system 200 including a nonsystematically shortened code encoder 202 having an input 204 adapted to receive input digital signals having a number of bits, the nonsystematically shortened code encoder 202 is adapted to produce encoded shortened code digital signals in accordance with the input digital signals. The communication system further including a nonsystematically shortened code decoder 208 adapted to receive the encoded shortened code digital signals, wherein the nonsystematically shortened code decoder 208 is adapted to produce an estimate of the input digital signals and an error detection flag.
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Citations
18 Claims
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1. A communication system, comprising:
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a nonsystematically shortened code encoder having an input adapted to receive input digital signals comprising a number of bits, wherein the nonsystematically shortened code encoder is adapted to produce encoded shortened code digital signals in accordance with the input digital signals, wherein the input digital signals do not appear within the encoded shortened code digital signals; and
a nonsystematically shortened code decoder adapted to receive the encoded shortened code digital signals, wherein the nonsystematically shortened code decoder is adapted to produce an estimate of the input digital signals and an error detection flag. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
a bit insertion circuit for inserting a first predetermined number of bits into the input digital signals;
an encoder coupled to the bit insertion circuit for producing encoded digital signals; and
a bit deletion circuit coupled to the encoder for deleting a second predetermined number of bits of the encoded digital signals thereby generating the encoded shortened code digital signals.
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3. The communication system of claim 2, wherein the nonsystematically shortened code decoder comprises:
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a weight insertion circuit for receiving values defining the encoded shortened code digital signals and providing predetermined weights corresponding to the second predetermined number of bits;
a decoder coupled to the weight insertion circuit, receiving the values defining the encoded shortened code digital signals and the predetermined weights corresponding to the second predetermined number of bits; and
a detection circuit coupled to the decoder for producing the estimate of said input digital signals and the error detection flag.
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4. The communication system of claim 2, wherein the encoder is a hexacode-based multilevel Golay encoder.
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5. The communication system of claim 1, wherein the decoder is a hexacode-based Golay decoder.
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6. The communication system of claim 1, wherein the decoder is a soft-decision decoder.
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7. The communication system of claim 1, wherein the decoder is a hard-decision decoder.
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8. The communication system of claim 1, wherein the error detection flag is hard-valued.
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9. The communication system of claim 1, wherein the error detection flag is soft-valued.
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10. A method comprising the steps of:
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inserting a first predetermined number of bits into input digital signals having a number of bits;
nonsystematically encoding the input digital signals;
generating nonsystematically encoded digital signals;
deleting a second predetermined number of bits of the nonsystematically encoded digital signals;
generating nonsystematically encoded shortened code digital signals;
providing predetermined weights corresponding to the second predetermined number of bits;
decoding the nonsystematically encoded shortened code digital signals;
producing an estimate of the input digital signals; and
producing an error detection flag.
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11. A radio transmitter, comprising:
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a nonsystematically shortened code encoder having an input adapted to receive input digital signals comprising a number of bits, wherein the nonsystematically shortened code encoder is adapted to produce encoded shortened code digital signals in accordance with the input digital signals, wherein the nonsystematically shortened code encoder comprises;
a bit insertion circuit for inserting a first predetermined number of bits into the input digital signals;
an encoder coupled to the bit insertion circuit for producing encoded digital signals; and
a bit deletion circuit coupled to the encoder for deleting a second predetermined number of bits of the encoded digital signals thereby generating the encoded shortened code digital signals. - View Dependent Claims (12)
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13. A phone, comprising:
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a nonsystematically shortened code decoder adapted to receive encoded shortened code digital signals from an encoder responsive to input digital signals, and wherein the nonsystematically shortened code decoder is adapted to produce an estimate of the input digital signals and an error detection flag, wherein the nonsystematically shortened code decoder comprises;
a weight insertion circuit for receiving values defining the encoded shortened code digital signals and providing predetermined weights corresponding to a predetermined number of bits deleted in the encoded shortened code digital signals;
a decoder coupled to the weight insertion circuit, receiving the values defining the encoded shortened code digital signals and the predetermined weights corresponding to the predetermined number of bits deleted in the encoded shortened code digital signals; and
a detection circuit coupled to the decoder for producing the estimate of said input digital signals and the error detection flag. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification