Method for configuring circuits over a data communications link

• US 6,324,672 B1
• Filed: 02/16/2000
• Issued: 11/27/2001
• Est. Priority Date: 03/29/1996
• Status: Expired due to Term

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Wells, Robert W., Lawman, Gary R., Linoff, Joseph D.
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Siek, Vuthe
• Application Number:
  US09/505,600
• Time in Patent Office: 650 Days
• Field of Search: 716/1, 716/16, 716/17, 716/18, 716/11, 716/6
• US Class Current: 716/102
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A method of specifying design parameters is provided for configuring circuits for programmable ICs. A design database describing a circuit is displayed in table-based format on a computer screen display. The design database may include a memory map including data to be placed in bit-storage space in the target programmable IC. This design database requires no schematics or HDL description of the circuit, even for complicated application-specific circuits. The desired parameters are entered by the user, typically using toggle buttons, pull-down menus, or keyboard entry. The selected parameters are then entered into the design database, thereby configuring the design database in accordance with the selected parameters. Next, the design database is transmitted over a data communications link such as the internet to a second computer, on which the compilation software resides. The design is then compiled and the resulting netlist is transmitted back to the originating computer. In one embodiment, a schematic symbol or HDL instantiation is also generated by the second computer, and transmitted back to the originating computer.

Claims

1. A method of off-loading work from a computer while generating a netlist representing a circuit, the method comprising:

on a first computer, receiving a selection of parameters from a user, the parameters being specified by the user based on desired characteristics for the circuit;

on the first computer, entering the parameters in a design file;

transmitting the design file from the first computer to a second computer over a data communications link;

remotely compiling, on the second computer, the design file to generate the netlist; and

transmitting the netlist from the second computer to the first computer over the data communications link.

2. The method of claim 1, wherein the data communications link comprises a Wide Area Network.

3. The method of claim 1, wherein the data communications link comprises a Local Area Network (LAN).

4. The method of claim 1, wherein the data communications link comprises first and second transducers forming links to each of the first and second computers, respectively.

5. The method of claim 1, further comprising:

remotely generating, on the second computer, a schematic symbol that represents the netlist; and

transmitting the schematic symbol from the second computer to the first computer over the data communications link.

6. The method of claim 1, further comprising:

remotely generating, on the second computer, an HDL instantiation that represents the netlist; and

transmitting the HDL instantiation from the second computer to the first computer over the data communications link.

7. A method of off-loading work from a computer while placing and routing a circuit, the method comprising:

on a first computer, receiving a selection of parameters from a user, the parameters being specified by the user based on desired characteristics for the circuit;

on the first computer, entering the parameters in a design file;

transmitting the design file from the first computer to a second computer over a data communications link;

remotely generating, on the second computer, a placed and routed design from the design file; and

transmitting the placed and routed design from the second computer to the first computer over the data communications link.

8. The method of claim 7, wherein the data communications link comprises a Wide Area Network.

9. The method of claim 7, wherein the data communications link comprises a Local Area Network (LAN).

10. The method of claim 7, wherein the data communications link comprises first and second transducers forming links to each of the first and second computers, respectively.

11. A method of off-loading work from a computer while generating a device program file representing at least a portion of a programmable integrated circuit (IC), the method comprising:

on a first computer, receiving a selection of parameters from a user, the parameters being specified by the user based on desired characteristics for a circuit to be implemented in the programmable IC;

on the first computer, entering the parameters in a design file;

transmitting the design file from the first computer to a second computer over a data communications link;

remotely generating, on the second computer, the device program file from the design file; and

transmitting the device program file from the second computer to the first computer over the data communications link.

12. The method of claim 11, wherein the data communications link comprises a Wide Area Network.

13. The method of claim 11, wherein the data communications link comprises a Local Area Network (LAN).

14. The method of claim 11, wherein the data communications link comprises first and second transducers forming links to each of the first and second computers, respectively.

15. A method of off-loading work from a computer while generating a schematic symbol for a logic circuit, the method comprising:

entering, on a first computer, data descriptive of the logic circuit;

transmitting the data from the first computer to a second computer over a data communications link;

remotely generating, on the second computer, the schematic symbol from the transmitted data; and

transmitting the schematic symbol from the second computer to the first computer over the data communications link.

16. The method of claim 15, wherein the data communications link comprises a Wide Area Network.

17. The method of claim 15, wherein the data communications link comprises a Local Area Network (LAN).

18. The method of claim 15, wherein the data communications link comprises first and second transducers forming links to each of the first and second computers, respectively.

19. A method of off-loading work from a computer while generating an HDL instantiation for a logic circuit, the method comprising:

entering, on a first computer, data descriptive of the logic circuit;

transmitting the data from the first computer to a second computer over a data communications link;

remotely generating, on the second computer, the HDL instantiation from the transmitted data; and

transmitting the HDL instantiation from the second computer to the first computer over the data communications link.

20. The method of claim 19, wherein the data communications link comprises a Wide Area Network.

21. The method of claim 19, wherein the data communications link comprises a Local Area Network (LAN).

22. The method of claim 19, wherein the data communications link comprises first and second transducers forming links to each of the first and second computers, respectively.