Mounting technology for intersubband light emitters

• US 6,326,646 B1
• Filed: 11/24/1999
• Issued: 12/04/2001
• Est. Priority Date: 11/24/1999
• Status: Expired due to Term

• Current Assignee: RPX Corporation
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Gmachl, Claire, Chu, George Sung-Nee, Capasso, Federico, Tredicucci, Alessandro, Cho, Alfred Yi, Sivco, Deborah Lee, Sergent, Arthur Mike, Hutchinson, Albert Lee, Baillargeon, James Nelson
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Wille, Douglas A.
• Application Number:
  US09/448,929
• Time in Patent Office: 741 Days
• Field of Search: 372/44, 257/94, 438/29, 438/33
• US Class Current: 257/94
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01S 5/0202 Cleaving
• CPC Class Codes: H01S 5/0237 by soldering
• CPC Class Codes: H01S 5/02375 Positioning of the laser chips
• CPC Class Codes: H01S 5/02469 Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
• CPC Class Codes: H01S 5/04256 characterised by the configuration
• CPC Class Codes: H01S 5/2275 mesa created by etching
• CPC Class Codes: H01S 5/3402 intersubband lasers, e.g. transitions within the conduction or valence bands

Abstract

A mounting technology that increases the cw operating temperature of intersubband lasers, without increasing the risk of hot spots near the facets and short circuits near the perimeter of the laser chip, is described. In accordance with one embodiment of our invention, a method of fabricating a intersubband semiconductor laser comprises the steps of providing a single crystal semiconductor substrate, forming on the substrate an epitaxial region that includes a core region and an intersubband active region in the core region, forming front and back facets that define an optical cavity resonator, forming a metal electrode on the epitaxial region so as to provide an electrical connection to said active region, and mounting said laser on a heat sink, characterized in that the mounting step includes the steps of (i) soldering the electrode to the heat sink so that the front facet overhangs an edge of the heat sink and (ii) cleaving off the overhanging portion of the laser so as to form a new front facet that is essentially flush with the edge of said heat sink. In accordance with another embodiment, our invention is further characterized in that metal electrode to the epitaxial region is recessed from the edges of the laser chip. In accordance with yet another embodiment, our invention is further characterized in that the back facet of the laser is coated so that any solder that might tend to creep onto the back facet contacts the coating and not semiconductor material (in particular the ends of the active region).

Claims

1. A method of fabricating an intersubband semiconductor light emitter comprising the steps of:

(a) providing a single crystal semiconductor substrate,

(b) forming on said substrate an epitaxial region that includes a core region and an intersubband active region in said core region,

(c) forming front and back facets on opposite ends of said active region,

(d) forming a metal electrode on said epitaxial region so as to provide an electrical connection to said active region, and

(e) mounting said laser on a surface of a heat sink, characterized in that

said mounting step (e) includes the steps of (e1) soldering said electrode to said heat sink so that said front facet overhangs an edge of said heat sink and (e2) cleaving off the overhanging portion of said laser so as to form a new front facet that is essentially flush with said edge of said heat sink.

2. The invention of claim 1 wherein said mounting step (e) includes designing said heat sink so that said surface is electrically conducting all the way to said edge and said soldering step (e1) causes said solder to adhere to said surface and to extend all the way to said edge.

3. The invention of claim 1 wherein said epitaxial region forming step (b) includes the steps of (b1) forming upper and lower cladding regions bounding said core region, (b2) forming at least said upper cladding region and said active region in the shape of an elongated mesa, said mesa having said front and back facets at opposite ends thereof and having sidewalls and a top surface, (b3) forming a patterned first insulating layer over said mesa, said first layer having an opening that exposes said top surface, and wherein said electrode forming step (d) includes the step of (d1) forming said electrode on said first layer and on said top surface.

4. The invention of claim 3 wherein said electrode forming step includes the step (d2) of recessing said electrode from the edges of said emitter.

5. The invention of claim 1 wherein said facet forming step (c) includes the steps of (c1) forming an insulating second layer on said back facet and (c2) forming a metal layer on said second layer so that any solder that would tend to flow onto said back facet contacts said metal layer and not the semiconductor material of the back facet.

6. The invention of claim 1 wherein said epitaxial region forming step (b) includes forming said core and active regions of Group III-V compound semiconductor materials.

7. The invention of claim 3 wherein said soldering step (e1) and said first layer forming step (b3) are mutually adapted so that the material of said first layer is not wet by the solder used in soldering step.

8. The invention of claim 7 wherein said soldering step (e1) includes soldering said emitter to said heat sink using In-based solder.

9. The invention of claim 4 wherein said electrode forming step (d2) includes the step of recessing said electrode from the edges of said emitter by a distance of at least 10 μ

m.

10. The invention of claim 9 wherein said electrode forming step (d2) includes the step of recessing said electrode from the edges of said emitter by a distance of about 100 μ

m.

11. The invention of claim 1 wherein said electrode forming step (d) forms said electrode in the shape of a pair of intersecting rectangles.

12. A method of fabricating an intersubband semiconductor laser comprising the steps of:

(a) providing a single crystal semiconductor substrate,

(b) forming on said substrate an epitaxial region that includes a core region and an intersubband active region in said core region, said forming step (b) including the steps of (b1) forming upper and lower cladding regions bounding said core region, (b2) forming at least said upper cladding region and said active region in the shape of an elongated mesa having sidewalls and a top surface, (b3) forming a patterned first insulating layer over said mesa, said first layer having an opening that exposes said top surface, and wherein said electrode forming step (d) includes the step of (d1) forming said electrode on said first layer and on said top surface,

(c) forming front and back facets on opposite ends of said mesa so as to define an optical cavity resonator, said active region being disposed in said resonator,

(d) forming a metal electrode on said sidewalls and top surface of said mesa so as to provide an electrical connection to said active region, and

(e) mounting said laser on a surface of a heat sink, characterized in that

said mounting step (e) includes the steps of (e1) soldering said electrode to said heat sink with In-based solder so that said front facet overhangs an edge of said heat sink and (e2) cleaving off the overhanging portion of said laser so as to form a new front facet that is essentially flush with said edge of said heat sink,

said mounting step (e) includes designing said heat sink so that said surface is electrically conducting all the way to said edge and said soldering step (e1) causes said solder to adhere to said surface and to extend all the way to said edge,

said forming step (b3) includes the step of forming said insulating layer from a material that is not wet by said In solder,

said electrode forming step (d) includes the step of recessing said electrode from the edges of said laser by a distance of at least 10 μ

m, and

said facet forming step (c) includes the steps forming an insulating second layer on said back facet and forming a metal layer on said second layer so that any solder that would tend to flow onto said back facet contacts said metal layer and not the semiconductor material of the back facet.