Power switch with a controlled DI/DT

• US 6,326,648 B1
• Filed: 12/20/1999
• Issued: 12/04/2001
• Est. Priority Date: 12/20/1999
• Status: Expired due to Term

• Current Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Austin, Patrick, Bernier, Eric, Roy, Mathieu, Sanchez, Jean-Louis, Breil, Marie, Laur, Jean-Pierre, Jalade, Jean
• Primary Examiner(s): Meier, Stephen D.
• Application Number:
  US09/467,357
• Time in Patent Office: 715 Days
• Field of Search: 257/135, 257/139, 257/140
• US Class Current: 257/130
• CPC Class Codes: H01L 27/0623 in combination with bipolar transistors
• CPC Class Codes: H01L 29/7416 the device being an antiparallel diode, e.g. RCT shorted anode structures enabling reverse conduction H01L29/0834
• CPC Class Codes: H01L 29/7428 having an amplifying gate structure, e.g. cascade (Darlington) configuration
• CPC Class Codes: H01L 29/749 with turn-on by field effect

Abstract

A monolithic power switch with a controlled di/dt including the parallel assembly of a MOS or IGBT type component with a thyristor type component, including means for inhibiting the thyristor type component during the closing phase of the switch, which is ensured by the IGBT type component. The IGBT type component has a vertical multicell structure and the component of thyristor type has a vertical monocell structure.

Claims

1. A monolithic power switch with a controlled di/dt including:

a transistor;

a thyristor type component connected in parallel with the transistor;

means for inhibiting the thyristor type component during a closing phase of the switch, the closing phase being ensured by transistor; and

wherein the transistor has a vertical multicell structure and the thyristor type component has a vertical monocell structure.

2. The monolithic switch of claim 1, further including a diode of vertical type biased inversely to a biasing of the thyristor.

3. The monolithic power switch of claim 1, wherein the means for inhibiting the thyristor type component includes a MOS transistor connected between a gate of the thyristor and a cathode of the thyristor.

4. The monolithic power switch of claim 3, including means for self-biasing the MOS transistor.

5. The monolithic power switch of claim 1, wherein the transistor is a MOS type component.

6. The monolithic power switch of claim 1, wherein the transistor is a IGBT type component.

7. The monolithic power switch of claim 1, formed in a substrate of a first conductivity type having a rear surface including a region of a second conductivity type, the switch comprising:

an auxiliary thyristor having a cathode and a cathode-gate region;

a first plurality of cells forming part of the transistor and disposed on an upper surface side of the substrate;

a second plurality of cells forming part of the transistor and disposed on an upper surface side of the substrate, the second plurality of cells having a cathode region; and

a cathode gate well containing a cathode of the thyristor and the cathode of the auxiliary thyristor;

wherein the cathode region of the second plurality of cells is connected to the cathode of the auxiliary thyristor and to the cathode-gate region of the auxiliary thyristor; and

wherein the cathode of the thyristor and a cathode-gate of the thyristor are connected to a cathode terminal; and

wherein an area of the cathode gate well disposed between the cathode of the thyristor and the cathode of the auxiliary thyristor is coated with an isolated gate.

8. The monolithic power switch of claim 1, formed in a substrate of a first conductivity type having a rear surface including a first region of a second conductivity type, the switch comprising:

an auxiliary thyristor;

a first plurality of cells disposed on an upper surface side of the substrate and forming part of the transistor, the first plurality of cells having a gate; and

a second plurality of cells formed in a second region of the second conductivity type, the second plurality of cells forming part of the transistor and part of the auxiliary thyristor;

wherein the second region of the second conductivity type contains first and second rings of the first conductivity type separated by a first isolated gate, the first isolated gate connected to a central portion of the second region by a metallization; and

wherein the second ring is separated from a periphery of the second region by a second isolated gate, the second isolated gate connected to the gate of the first plurality of cells.

9. A monolithic power switch having a controlled di/dt comprising:

a power transistor;

a power thyristor connected in parallel with the power transistor; and

a control circuit connected between the power transistor and the power thyristor to inhibit the thyristor during a closing phase of the switch.

10. The monolithic power switch of claim 9, further including a diode having an anode connected to a cathode of the thyristor, and a cathode connected to an anode of the thyristor.

11. The monolithic power switch of claim 10, formed in a substrate of a first conductivity type, comprising:

a first region of a second conductivity type disposed on a lower surface of the substrate of the first conductivity type;

a plurality of first cells disposed on an upper surface of the substrate, each cell including a respective ring-shaped region of the first conductivity type disposed in a second region of the second conductivity type, the cells forming part of the power transistor, the power transistor having a multicell structure;

a first region of the first conductivity type disposed in a well of the second conductivity type disposed on the upper surface of the substrate to form part of the power thyristor, the thyristor having a monocell structure; and

a third region of the second conductivity type formed on the upper surface of the substrate, and a first heavily doped region of the first conductivity type disposed on the lower surface of the substrate, said regions forming the diode.

12. The monolithic power switch of claim 11, wherein the control circuit comprises:

a plurality of second cells disposed on the upper surface of the substrate, each cell including second and third rings of the first conductivity type, the rings being disposed in a fourth region of the second conductivity type, the second ring being separated from the third ring by a first isolated gate and connected to a central portion of the fourth region by a fourth metallization, and the third ring being separated from a periphery portion of the fourth regions by a second isolated gate, the second isolated gate being connected to the first metallization.

13. The monolithic power switch of claim 9, formed in a substrate of a first conductivity type, comprising:

a first region of a second conductivity type disposed on a lower surface of the substrate of the first conductivity type;

a plurality of first cells disposed on an upper surface of the substrate, each cell including a respective ring-shaped region of the first conductivity type disposed in a second region of the second conductivity type, the cells forming part of the power transistor, the power transistor having a multicell structure;

a first region of the first conductivity type disposed in a well of the second conductivity type disposed on the upper surface of the substrate to form part of the power thyristor, the thyristor having a monocell structure;

a first metallization disposed above the plurality of first cells, isolated from the ring-shaped region of the first conductivity type and the second region of the second conductivity type, to provide a gate of the transistor,

a second metallization contacting at least the first region of the first conductivity type and the second region of the second conductivity type to provide a common cathode of the thyristor and the transistor; and

a third metallization contacting the first region of the second conductivity type to provide a common anode of the transistor and the thyristor.

14. The monolithic power switch of claim 13, wherein the control circuit comprises:

a plurality of second cells disposed on the upper surface of the substrate, each cell including a respective second ring-shaped region of the first conductivity type disposed in a third region of the second conductivity type.