Backside contact for touchchip

• US 6,326,689 B1
• Filed: 07/26/1999
• Issued: 12/04/2001
• Est. Priority Date: 07/26/1999
• Status: Expired due to Term

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Thomas, Danielle A.
• Primary Examiner(s): CLARK, JASMINE JHIHAN B
• Application Number:
  US09/360,802
• Time in Patent Office: 862 Days
• Field of Search: 257/734, 257/735, 257/697, 257/698, 257/730, 257/773, 257/774, 257/775, 257/781
• US Class Current: 257/734
• CPC Class Codes: H01L 2224/02371 connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05569 the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/014 Solder alloys

Abstract

A contact is formed within an active region of a substrate at the edge of a die, preferably within the first metallization level in the active region of the substrate. An opening having sloped sidewalls is then etched into the back side of the substrate, exposing a portion of the active region contact. An interconnect is formed on the opening sidewall to connect the active region contact with a die contact pad on the backside surface of the substrate. The active region contact preferably spans a boundary between two die, with the opening preferably etched across the boundary to permit inter-connects on opposing sidewalls of the opening to each contact the active region contact within different die, connecting the active region contact to die contact pads on different dice. The dice are then separated along the boundary, through the active region contact which becomes two separate active region contacts. By forming a shared contact opening spanning two dice, the backside contact is formed around the die edge and the backside surface area necessary for the contact opening is minimized. The backside contact allows direct placement of the integrated circuit die on contacts within the packaging, such as a ball grid array, eliminating the need for wire bonds. The need for a pad etch through passivation material overlying active devices on the front side of the die is also eliminated, and no mask levels are added for the devices formed on the front side.

Claims

1. An integrated circuit structure, comprising:

a contact within an active portion of a substrate extending across a boundary between two integrated circuit die;

an opening in a back side of the substrate spanning the boundary and exposing a portion of the contact on both sides of the boundary;

first and second conductive lines on sidewalls of the opening, the first and second conductive lines each extending, on opposite sides of the boundary, from the exposed portion of the contact to a backside surface of the substrate adjacent the opening; and

first and second contact pads on the backside surface of the substrate on opposite sides of the boundary, the first and second contact pads electrically connecting to the first and second conductive lines, respectively.

2. The integrated circuit structure of claim 1, wherein the contact has a width, extending in a direction across the boundary, exceeding a kerf of a device to be employed in separating the two integrated circuit die along the boundary through the contact.

3. The integrated circuit structure of claim 1, wherein the opening has sloped sidewalls and a depth at least equal to the distance between the contact and the backside surface of the substrate.

4. The integrated circuit structure of claim 1, further comprising:

a dielectric on the sidewalls of the opening and the backside surface of the substrate between the substrate and the conductive lines and between the substrate and the backside contact pads.

5. The integrated circuit structure of claim 1, further comprising:

a scribe line on the substrate along the boundary.

6. The integrated circuit structure of claim 1, further comprising:

a sawed region in the substrate along the boundary.

7. The integrated circuit structure of claim 2, wherein the contact has a width equal to the kerf of a scribe, a margin for preventing clipping of contacts on each side of the boundary, and a required contact area.

8. The integrated circuit structure of claim 2, wherein the contact has a width equal to the kerf of a saw and twice a required contact area.

9. The integrated circuit structure of claim 3, wherein the opening is etched with a KOH-based etch in <

100>

silicon.

10. An integrated circuit device, comprising:

an active region contact in an active portion of a die extending from an edge of the die inward;

an opening in a back side of the die exposing a portion of the active region contact at the edge;

a conductive line on a sidewall of the opening extending from the exposed portion of the active region contact to a backside surface of the die adjacent the opening; and

a contact pad on the backside surface of the die and electrically connected to the active region contact through the conductive line.

11. The integrated circuit device of claim 10, further comprising:

a package containing the die, the package including a package contact electrically connected to the contact pad on the backside surface of the die.

12. The integrated circuit device of claim 10, wherein the opening extends to the edge of the die.

13. The integrated circuit device of claim 10, wherein an end of the conductive line contacting the contact within the opening extends to the edge of the die.

14. The integrated circuit device of claim 10, wherein an end of the conductive line contacting the contact within the opening is spaced apart from the edge of the die.

15. An integrated circuit structure, comprising:

one or more contacts within an active portion of a substrate extending across a boundary between two integrated circuit die;

a contact opening in a back side of the substrate spanning the boundary and exposing a portion of each of the contacts on both sides of the boundary;

for each of the contacts;

first and second conductive lines on sidewalls of the opening for each of the contacts, the first and second conductive lines each extending, on opposite sides of the boundary, from the exposed portion of a contact to a backside surface of the substrate adjacent the opening; and

first and second contact pads on the backside surface of the substrate on opposite sides of the boundary, the first and second contact pads electrically connecting to the first and second conductive lines, respectively; and

a separation opening extending from a bottom of the contact opening through the active portion of the substrate along at least a portion of the boundary, the separation opening separating each contact intersected into two portions.

16. The integrated circuit structure of claim 15, wherein the separation opening has a width which is less than a width of the bottom of the contact opening.

17. The integrated circuit structure of claim 15, wherein the separation opening has a width which is approximately equal to a width of the bottom of the contact opening.

18. The integrated circuit structure of claim 15, wherein the separation opening has a width which is equal to a kerf of a device employed in forming the separation opening.

19. The integrated circuit structure of claim 15, wherein the separation opening extends to an edge of each conductive line.

20. The integrated circuit structure of claim 15, wherein the separation opening is spaced apart from each conductive line.