High gain, high speed, rail-to-rail amplifier

• US 6,326,847 B1
• Filed: 06/12/2000
• Issued: 12/04/2001
• Est. Priority Date: 09/10/1998
• Status: Expired due to Term

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Xu, Ping
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US09/592,099
• Time in Patent Office: 540 Days
• Field of Search: 330/252, 330/253, 330/255, 330/257
• US Class Current: 330/253
• CPC Class Codes: H03F 2203/45028 the differential amplifier amplifying transistors are folded cascode coupled transistors
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 2203/45398 the AAC comprising a voltage generating circuit as bias circuit for the AAC
• CPC Class Codes: H03F 2203/45508 the CSC comprising a voltage generating circuit as bias circuit for the CSC
• CPC Class Codes: H03F 2203/7203 the gated amplifier being switched on or off by a switch in the bias circuit of the amplifier controlling a bias current in the amplifier
• CPC Class Codes: H03F 2203/7221 the gated amplifier being switched on or off by a switch at the output of the amplifier
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45192 Folded cascode stages
• CPC Class Codes: H03F 3/4521 Complementary long tailed pairs having parallel inputs and being supplied in parallel
• CPC Class Codes: H03F 3/45219 Folded cascode stages
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

A high gain, high speed rail-to-rail amplifier that comprises two symmetrical input stages: an n-input stage responsive to middle and high range input voltages and a p-input stage responsive to low and middle range input voltages. A gain stage, in electrical communication with each of the input stages, receives current from the n-input stage when the input voltage signal is in the middle or high ranges and receives current from the p-input stage when the input voltage signal is in the low or middle ranges to provide amplification of the input voltage signal at the upper and lower ends of its range and provide increased amplification in the middle range. The amplifier further includes an output stage that includes two MOS transistors that cooperate to increase the output signal range and to provide the amplifier with increased driving ability.

Claims

1. A rail-to-rail amplifier, comprising:

a first input stage comprising a first input transistor and a second input transistor responsive to an input signal, and first and second input current paths;

a second input stage comprising a third input transistor and a fourth input transistor responsive to the input signal, a third input current path coupled to the second input current path, and a fourth current path coupled to the first input current path; and

a gain stage comprising a first node coupled to the second and third input current paths, a second node coupled to the first and fourth current paths, and a third node on which a control signal is generated;

wherein the gain stage receives current from the first input current path combined with current from the fourth input current path and receives current from the second input current path combined with current from the third input current path when the input signal is between a first middle value and a second middle value higher than the first middle value, receives current from the first and second input current paths only when the input signal is between the second middle value and a high value, and receives current from the third and fourth input current paths only when the input signal is between a low value and the first middle value.

2. The rail-to-rail amplifier of claim 1, further comprising an output stage coupled to the gain stage, the output stage comprising a first pair of output transistors interconnected to form an output node where an output signal is generated, wherein one of the first pair of output transistors is responsive to the control signal.

5. The rail-to-rail amplifier of claim 1, wherein the first input stage further comprises

a first load transistor coupled to the first input transistor,

a second load transistor coupled to the second input transistor,

a transistor coupled to the first load transistor to form a current mirror that generates current in the first current path, and

a transistor coupled to the second load transistor to form a current mirror that generates current in the second current path.

3. A rail-to-rail amplifier, comprising:

a first input stage comprising a first input transistor responsive to a first input signal, a second input transistor responsive to a second input signal, and first and second input current paths;

a second input stage comprising a third input transistor responsive to the first input signal, a fourth input transistor responsive to the second input signal, a third input current path coupled to the second input current path, and a fourth current path coupled to the first input current path;

a gain stage comprising a first node coupled to the second and third input current paths, a second node coupled to the first and fourth current paths, and a third node on which a control signal is generated; and

an output stage coupled to the gain stage, the output stage comprising a first pair of output transistors interconnected to form an output node where an output signal is generated, wherein one of the first pair of output transistors is responsive to the control signal, the output stage further comprising a second pair of output transistors, one of which is responsive to the control signal.

4. The rail-to-rail amplifier of claim 3, wherein the second pair of transistors cooperate to increase the output signal range and to provide the amplifier with increased driving ability.

6. A rail-to-rail amplifier, comprising:

a pair of input stages, each selectively responsive to a differential input signal;

a gain stage in electrical communication with each of the input stages to amplify the differential input signal; and

an output stage comprising a first pair of field effect output transistors interconnected to form an output node where an output signal is generated, and a second pair of field effect output transistors that cooperate to increase the output signal range and to provide the amplifier with increased driving ability, wherein a gate of one of the first pair of output transistors and a gate of one of the second pair of output transistors are each responsive to a control signal that decreases when the output signal increases.

7. A rail-to-rail amplifier, comprising:

first means for receiving a differential input signal, and for selectively generating first and second input currents;

second means for receiving the differential input signal, and for selectively generating third and fourth input currents, wherein the third input current is selectively combined with the second input current and the fourth input current is selectively combined with the first input current; and

means, in electrical communication with each of the first and second receiving means, for amplifying the differential input signal and for generating a control signal, wherein the amplification means

receives the first input current combined with the fourth input current and receives the second input current combined with the third input current when the input signal is between a first middle value and a second middle value higher than the first middle value,

receives the first and second input currents only when the input signal is between the second middle value and a high value, and

receives the third and fourth input currents only when the input signal is between a low value and the first middle value.

8. The rail-to-rail amplifier of claim 7, further comprising output means comprising a first pair of output controlling means for generating an output signal, wherein one of the first pair of output controlling means is responsive to the control signal.

9. The rail-to-rail amplifier of claim 8, wherein the output means further comprises a second pair of output controlling means for increasing the output signal range and for providing the amplifier with increased driving ability, wherein one of the second pair of output controlling means is responsive to the control signal which decreases when the output signal increases.

10. The rail-to-rail amplifier of claim 7, wherein the first receiving means comprises

first current mirror means for generating the first input current, and

second current mirror means for generating the second input current.

11. A rail-to-rail amplifier, comprising:

a pair of input means, each selectively responsive to a differential input signal;

means, in electrical communication with each of the input stages, for amplifying the differential input signal and for generating a control signal; and

output means comprising a first pair of field effect output controlling means for generating an output signal, and a second pair of field effect output controlling means for increasing the output signal range and for providing the amplifier with increased driving ability, wherein a gate of one of the first pair of output controlling means and a gate of one of the second pair of output controlling means are each responsive to the control signal that decreases when the output signal increases.