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System and method for compressing and decompressing configuration data for an FPGA

  • US 6,327,634 B1
  • Filed: 08/25/1998
  • Issued: 12/04/2001
  • Est. Priority Date: 08/25/1998
  • Status: Expired due to Term
First Claim
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1. A method for providing a configuration data file to a programmable logic device (PLD), the method comprising:

  • statistically analyzing the configuration data file and generating a plurality of recurring bit sequences, each recurring bit sequence including low and high values in a different sequence;

    assigning alphabetic sequences to the recurring bit sequences;

    compressing the configuration data file by substituting the alphabetic sequences for the recurring bit sequences, thereby generating a compressed data file;

    loading the compressed data file into a memory device; and

    decompressing the compressed data file by substituting the recurring bit sequences for the alphabetic sequences, wherein the memory device comprises a plurality of stored alphabets, each alphabet comprising a plurality of alphabetic sequences, and the method further comprises;

    loading a code sequence into the memory device, the code sequence indicating one of the plurality of stored alphabets, the indicated one of the plurality of stored alphabets comprising the alphabetic sequences assigned in the step of assigning alphabetic sequences.

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