Skew adjusting method in IC testing apparatus and pseudo device for use in the method

• US 6,327,678 B1
• Filed: 04/05/1999
• Issued: 12/04/2001
• Est. Priority Date: 04/03/1998
• Status: Expired due to Term

• Current Assignee: Advantest Corporation
• Original Assignee: Advantest Corporation
• Inventors: Nagai, Hiroyuki
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Torres, Joseph D.
• Application Number:
  US09/286,358
• Time in Patent Office: 974 Days
• Field of Search: 714/700, 714/731, 714/735
• US Class Current: 714/700
• CPC Class Codes: G01R 31/31725 Timing aspects, e.g. clock distribution, skew, propagation delay for tester hardware G01R31/31937
• CPC Class Codes: G01R 31/3191 Calibration

Abstract

There are provided a skew adjusting method capable of accurately conducting a skew adjustment in an IC testing apparatus comprising a plurality of pin cards and an IC socket, and a pseudo device for use in the skew adjusting method. Any one 11N of the pin cards 11A to 11N which are connected to terminals of the IC socket respectively, is defined as a reference pin card. A plurality of pseudo devices 12 are prepared, each of which electrically connects to the reference pin card 11N one of the remaining pin cards through the IC socket when that pseudo device is mounted thereon. The pseudo devices are sequentially mounted on the IC socket to connect all drivers DR of the remaining pin cards one by one to a voltage comparator CP_N of the reference pin card. And variable delay circuits DRY1 and DRY2 of each pin card are adjusted so that a delay in phase of the driver of each pin card may coincide with a delay in phase defined as a reference.

Claims

1. In an IC testing apparatus comprising a plurality of pin cards and at least one IC socket, each of said pin cards being provided with at least one driver for supplying a test pattern signal to an IC under test and comparator means for logically comparing a response output signal from the IC under test with a predetermined value, a method of adjusting a skew in each of said pin cards comprising the steps of:

defining the comparator means provided in any one of said pin cards as reference detecting means;

preparing a plurality of pseudo devices each of which electrically connects, when mounted on said IC socket, the pin card provided with said reference detecting means to at least one of the remaining pin cards through said IC socket; and

sequentially mounting said plurality of pseudo devices on said IC socket to connect all of the remaining pin cards one after another to said reference detecting means, and adjusting the driving timing of the driver of each of the remaining pin cards to the detected timing of said reference detecting means.

2. The method according to claim 1, further comprising the steps of:

defining any one of the drivers of said pin cards, the driving timing thereof being adjusted to the detected timing of said reference detecting means, as a reference driver; and

supplying a driving signal outputted from said reference driver to each of the remaining pin cards through an associated pseudo device, and adjusting the detected timing of the comparator means of each of the remaining pin cards to the driving timing of said reference driver.

3. A pseudo device for use in the skew adjusting method as set forth in claim 1 or 2, which has substantially the same configuration as that of the IC under test and is provided with at least one connection line built therein for connecting a specified terminal of said IC socket to at least one of the remaining terminals thereof when said pseudo device is mounted on said IC socket.

4. The method according to claim 1 or 2, wherein the comparator means of each of said pin cards is a voltage comparator for determining whether the response output signal outputted from the IC under test has a predetermined logical L voltage or logical H voltage, and said step of adjusting the driving timing of the driver of each of the remaining pin cards to the detected timing of said reference detecting means is a step of measuring the rise timing and the fall timing of the driving signal outputted from the driver of each pin card, and adjusting the driving timing of the driver of each pin card to a central value of the measured rise timings or the measured fall timings.

5. The method according to claim 1 or 2, wherein the number of said pin cards is equal to the number of terminals of said IC socket, and each of said plurality of pseudo devices is provided with one connection line built therein, said connection line connecting, when each pseudo device is mounted on said IC socket, the terminal thereof to which said pin card having said reference detecting means is connected to one of the remaining terminals of the IC socket through that pseudo device.

6. The method according to claim 1 or 2, wherein

defining the comparator means comprises setting the detected timing of said reference detecting means to a known value, and

adjusting the driving timing of the driver of a respective remaining pin card comprises:

measuring a delay time on the driver side of the respective remaining pin card relative to the detected timing of said reference detecting means; and

adjusting the delay time on the driver side of the respective remaining pin card to a fixed value based on the measured delay time on the driver side.