Slope and level trim DAC for voltage reference
First Claim
1. A circuit for adjusting the level or slope trim in a voltage reference, the circuit comprising:
- a differential amplifier connected across a reference resistor having a first terminal and a second terminal;
a first current mirror connected to an output of the differential amplifier; and
a second current mirror connected to the first current mirror.
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Accused Products
Abstract
A method and apparatus for trimming the level and slope in a voltage reference using current-switching DACs to inject small correction currents into or draw currents from the voltage reference circuit. Each DAC is controlled via a programmable non-volatile memory, which can be programmed after final packaging. Thus, the present technique enables trimming the voltage reference circuit after the circuit has been packaged. For the slope trim, the current is injected into or drawn from one side or the other of the band-gap core cell. The level trim DAC sources a correction current into or sinks a correction current from the resistor chain that sets the voltage level at the base of the transistors in the band-gap core. The level and slope trim DACs generate currents that are precise multiples of the currents through the resistors being trimmed. Thus the corrections are invariant with process and temperature, the necessary trim range is minimized, and the shape of the remaining error (curvature) is not altered. This current replication technique has the same effect as an ideal trim, i.e. produces the same result as changing the values of the resistors around which the trim circuits are placed.
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Citations
45 Claims
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1. A circuit for adjusting the level or slope trim in a voltage reference, the circuit comprising:
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a differential amplifier connected across a reference resistor having a first terminal and a second terminal;
a first current mirror connected to an output of the differential amplifier; and
a second current mirror connected to the first current mirror. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A circuit for adjusting the level or slope trim in a voltage reference, the circuit comprising:
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a differential amplifier connected across a reference resistor having a first terminal and a second terminal;
a first current mirror connected to an output of the differential amplifier; and
an output node connected to the first current mirror, wherein the first current mirror sinks a current through the output node from the voltage reference.- View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. A method for trimming the voltage level of an output voltage in a voltage reference circuit, the method comprising:
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producing a reference current having a similar temperature coefficient as a current flowing in the voltage reference;
mirroring the reference current to produce a desired base trim current;
mirroring the base trim current to produce a desired level trim correction current; and
injecting the level trim correction current into the voltage reference circuit. - View Dependent Claims (29, 30)
programming a non-volatile memory to control the current mirroring, after the voltage reference circuit has been packaged.
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30. The method of claim 29, wherein the mirroring of the reference current and the base trim current comprises selecting an appropriate combination of current mirror transistors.
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31. A method for trimming the slope of an output voltage in a voltage reference circuit, the method comprising:
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producing a reference current having a similar temperature coefficient as a current flowing in the voltage reference;
mirroring the reference current to produce a desired base slope current;
mirroring the base slope current to produce a desired slope trim correction current; and
injecting the slope trim correction current into a band-gap core. - View Dependent Claims (32, 33, 34)
programming a non-volatile memory to control the current mirroring, after the voltage reference circuit has been packaged.
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33. The method of claim 32, wherein the mirroring of the reference current and the base trim current comprises selecting an appropriate combination of current mirror transistors.
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34. The method of claim 33, wherein the slope trim correction current is selectably injected into one side of the band-gap core to adjust the slope up or down.
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35. A method for trimming the voltage level of an output voltage in a voltage reference circuit, the method comprising:
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producing a reference current having a similar temperature coefficient as a current flowing in the voltage reference;
mirroring the reference current; and
sinking a correction current equal to a multiple of the reference current from the voltage reference circuit. - View Dependent Claims (36, 37)
programming a non-volatile memory to control the current mirroring, after the voltage reference circuit has been packaged.
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37. The method of claim 36, wherein the mirroring of the reference current comprises selecting an appropriate combination of current mirror transistors.
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38. A method for trimming the slope of an output voltage in a voltage reference circuit, the method comprising:
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producing a reference current having a similar temperature coefficient as a current flowing in the voltage reference;
mirroring the reference; and
sinking a correction current equal to a multiple of the reference current from a band-gap core. - View Dependent Claims (39, 40, 41)
programming a non-volatile memory to control the current mirroring, after the voltage reference circuit has been packaged.
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40. The method of claim 39, wherein the mirroring of the reference comprises selecting an appropriate combination of current mirror transistors.
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41. The method of claim 40, wherein the slope trim correction current is selectably drawn from one side of the band-gap core to adjust the slope up or down.
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42. A circuit for adjusting the level or slope trim in a voltage reference, the circuit comprising:
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a differential amplifier connected across a reference resistor having a first terminal and a second terminal;
a first current mirror connected to an output of the differential amplifier;
a second current mirror connected to the first current mirror;
a third current mirror; and
an output node connected to the second and third current mirrors. - View Dependent Claims (43, 44, 45)
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Specification