×

Parallel associative learning memory for a standalone hardwired recognition system

  • US 6,332,137 B1
  • Filed: 02/11/1999
  • Issued: 12/18/2001
  • Est. Priority Date: 02/11/1999
  • Status: Expired due to Fees
First Claim
Patent Images

1. A recognition system, comprising:

  • a dynamically reconfigurable logic device similar to a field programmable gate array and programmed to do a feature extraction process from a media input stream; and

    a zero instruction set computer (ZISC) device that includes a plurality of neural networks that are connected to simultaneously receive a preprocessed feature extraction data from the dynamically reconfigurable logic device;

    wherein, a variety of recognition jobs can each be processed by the combination of the logic device and the ZISC by changing said feature extraction process via a dynamic reconfiguration and substantially no hardware changes.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×