Dual EPI active pixel cell design and method of making the same

• US 6,333,204 B1
• Filed: 01/21/1999
• Issued: 12/25/2001
• Est. Priority Date: 10/10/1997
• Status: Expired due to Term

• Current Assignee: SK Hynix Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Hook, Terence B., Wong, Hon-Sum P.
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Stevenson, Andre C
• Application Number:
  US09/234,809
• Time in Patent Office: 1,069 Days
• Field of Search: 438/14, 438/15, 438/18, 348/311, 348/222, 257/292, 250/214
• US Class Current: 438/48
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 27/14687 Wafer level processing

Abstract

The present invention is a dual epi active pixel sensor cell having a p− region of dual thickness and a method of making the same. The dual epi active pixel sensor cell produces a sensor with improved noise and latch-up reduction and improved red absorption. The thin p− epi region is positioned in the logic region for improved latch-up immunity. The thick p− epi is position in the pixel region for improved red absorption.

Claims

1. A method of making an active pixel sensor device comprising the steps of:

(a) providing a p type wafer substrate having a p+ region and a p−

epitaxy region wherein a portion of said p+ and p−

epitaxy region defines a logic region and another portion of said p+ and p−

epitaxy regions defines a pixel region;

(b) implanting a p+ region in said p−

epitaxy region positioned in said logic region; and

(c) creating a p−

epitaxy layer on said substrate above said logic and pixel regions to form a thin p−

region in said logic region and a thick p−

region in said pixel region.

2. A method of making an active pixel sensor device comprising the steps of:

(a) providing a p+ wafer substrate region wherein a portion of said p+ region defines a logic region and another portion of said p+ region defines a pixel region;

(b) etching said pixel region;

(c) growing p−

silicon in said pixel region; and

(d) creating a p−

epitaxy layer on said substrate above said logic and pixel regions to form a thin p−

region in said logic region and a thick p−

region in said pixel region.

3. A method of making an active pixel sensor device comprising the steps of:

(a) providing a semiconductor substrate doped at a first concentration;

(b) forming a doped layer having a surface positioned above the substrate, the doped layer being doped at a second concentration and extending a first distance below the surface in a logic region and a second distance below the surface in a pixel region, the second distance being greater than the first distance;

(c) constructing at least one photosensitive device in the doped layer in the pixel region and at least one logic device in the doped layer in the logic region.

4. The method of making an active pixel sensor device according to claim 3 wherein the second distance is at least about one micrometer greater than the first distance.

5. The method of making an active pixel sensor device according to claim 3 wherein the substrate and doped layer are p-type.

6. The method of making an active pixel sensor device according to claim 3 wherein the substrate and doped layer are n-type.

7. The method of making an active pixel sensor device according to claim 3 wherein the step of forming a doped layer comprises the steps of:

growing a first epitaxy layer on the substrate;

implanting a dopant into a portion of the first epitaxy layer to differentiate the logic region from the pixel region; and

growing a second epitaxy layer on the first epitaxy layer.

8. The method of making an active pixel sensor device according to claim 7 wherein:

the step of growing a first epitaxy layer comprises growing a first epitaxy layer doped at the second concentration;

the step of implanting a dopant into a portion of the first epitaxy layer comprises implanting a dopant into the logic region; and

the step of growing a second epitaxy layer on the first epitaxy layer comprises growing a second epitaxy layer doped at the second concentration.

9. The method of making an active pixel sensor device according to claim 3 wherein the step of forming a doped layer comprises the steps of:

growing a first epitaxy layer on the substrate;

etching the first layer to define the pixel region; and

growing a second epitaxy layer on the substrate above the logic and pixel regions, the second epitaxy layer being doped at the second concentration.

10. The method of making an active pixel sensor device according to claim 3 wherein the step of constructing at least one photosensitive device in the pixel region and at least one logic device in the logic region includes the steps of:

constructing at least one transfer device in series with said at least one photosensitive device, the transfer device being adapted to transfer electrons from the photosensitive device;

constructing at least one pre-charge device adapted to collect electrons which flow through said transfer device;

constructing at least one source-follower device adapted to amplify the electrons collected by said pre-charged device; and

constructing at least one bit switch device adapted to control an output signal.

11. The method of making an active pixel sensor device according to claim 3 wherein the step of constructing at least one photosensitive device in the pixel region and at least one logic device in the logic region includes constructing at least one logic device from the group consisting of a decoder, an embedded microprocessor, and a signal processing element.