Electrical interconnection package and method thereof

• US 6,333,563 B1
• Filed: 06/06/2000
• Issued: 12/25/2001
• Est. Priority Date: 06/06/2000
• Status: Expired due to Term

• Current Assignee: Veeco Instruments Incorporated
• Original Assignee: International Business Machines Corporation
• Inventors: Martin, Gregory B., Ray, Sudipta K., Call, Anson J., Goldmann, Lewis S., Farooq, Shaji, Courtney, Mark G., Jackson, Raymond A., Farooq, Mukta S., DeLaurentis, Stephen A.
• Primary Examiner(s): Flynn, Nathan
• Assistant Examiner(s): FORDE, REMMON R
• Application Number:
  US09/587,944
• Time in Patent Office: 567 Days
• Field of Search: 257/778, 257/738, 257/737, 257/734, 257/663, 257/692, 257/779, 257/723, 257/686, 257/685, 257/668, 257/787, 257/771, 257/772, 257/703, 257/702, 257/777, 257/73, 257/794
• US Class Current: 257/778
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/141 One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 2201/049 PCB for one component, e.g. for mounting onto mother PCB
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10977 Encapsulated connections
• CPC Class Codes: H05K 3/284 for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: H05K 3/3436 having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: H05K 3/368 parallel to each other H05K3/361 takes precedence

Abstract

The present invention relates generally to an electrical interconnection package and a method thereof. More particularly, the invention encompasses an invention that increases the fatigue life of a Ball Grid Array (BGA) electrical interconnection. This invention structurally couples at least one module to an organic interposer using a high modulus underfill material. The organic interposer is then joined to a organic board using standard joining processes. The inventive module can then be removed from the organic board at any time by moving the organic interposer using standard rework techniques.

Claims

1. An interconnect structure comprising, a substrate secured to at least one chip, at least one organic interposer secured to said substrate with at least one first interconnect, and at least one organic board secured to said at least one organic interposer using at least one second interconnect.

2. The interconnect structure of claim 1, wherein at least one first underfill is injected into said package between said substrate and said organic interposer.

3. The interconnect structure of claim 1, wherein said at least one first interconnect material has an onset of melting that is higher than the onset of melting of said at least one second interconnect material.

4. The interconnect structure of claim 1, wherein the melting onset for said first interconnect material is at least 25°

C. higher than the melting range of said second interconnect material.

5. The interconnect structure of claim 1, wherein the melting point of said first interconnect material is preferably in the range of between about 100°

C. and about 1,200°

C.

6. The interconnect structure of claim 1, wherein the melting point of said second interconnect material is preferably in the range of between about 100°

C. and about 1,200°

C.

7. The interconnect structure of claim 1, wherein at least one first underfill is injected into said package between said substrate and said organic interposer, and wherein said first underfill material is at least one high modulus filled epoxy.

8. The interconnect structure of claim 1, wherein said first interconnect material is selected from a group consisting of Cu, Sn, Sn/Pb, Sn/Ag, Sn/Sb, alloys of Sn and Cu alloys.

9. The interconnect structure of claim 1, wherein said second interconnect material is selected from a group consisting of Sn, Sn/Pb, Sn/Ag, Sn/Sb and alloys of Sn.

10. The interconnect structure of claim 1, wherein said first interconnect material is selected from a group consisting of ball and column.

11. The interconnect structure of claim 10, wherein height of said column is preferably in the range of between about 0.020 to about 0.150 inches.

12. The interconnect structure of claim 1, wherein diameter of said first interconnect is preferably in the range of between about 0.005 to about 0.025 inches.

13. The interconnect structure of claim 1, wherein said second interconnect material is selected from a group consisting of ball and column.

14. The interconnect structure of claim 13, wherein height of said column is preferably in the range of between about 0.020 to about 0.150 inches.

15. The interconnect structure of claim 1, wherein diameter of said column is preferably in the range of between about 0.005 to about 0.025 inches.

16. The interconnect structure of claim 1, wherein said organic interposer is selected from a group consisting of FR4, FR4 with surface laminar circuits (SLC) or organic chip carrier with at least one metal and at least one polyimide layer.

17. The interconnect structure of claim 1, wherein said organic board is selected from a group consisting of FR4, FR4 with surface laminar circuits (SLC) or organic chip carrier with at least one metal and at least one polyimide layer.

18. The interconnect structure of claim 1, wherein the size of said first interconnect material is preferably in the range of between about 0.020 to about 0.035 inches.

19. The interconnect structure of claim 1, wherein the size of said second interconnect material is preferably in the range of between about 0.020 to about 0.035 inches.

20. The interconnect structure of claim 1, wherein the thickness of said organic interposer is preferably in the range of between about 1.5 to about 3.0 mm.

21. The interconnect structure of claim 1, wherein material for said substrate is selected from a group consisting of ceramic, glass ceramic and multi-layer ceramic.