Arrangement for mounting chips in multilayer printed circuit boards

• US 6,333,856 B1
• Filed: 06/16/2000
• Issued: 12/25/2001
• Est. Priority Date: 06/17/1999
• Status: Expired due to Fees

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Harju, Thomas
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): Vigushin, John B.
• Application Number:
  US09/594,485
• Time in Patent Office: 557 Days
• Field of Search: 361/736, 361/760-764, 361/780, 361/784, 361/792-795, 361/803, 361/816, 361/818, 257/679, 257/691, 257/698, 257/700-704, 257/723, 257/724, 257/728, 257/784, 333/12, 333/246, 333/247, 174/52.4, 174/250, 174/255, 174/261, 174/262, 438/107, 438/125
• US Class Current: 361/761
• CPC Class Codes: H01L 2223/6627 Waveguides, e.g. microstrip line, strip line, coplanar line
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06572 Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1423 : Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/19032 : being a microstrip line type
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 1/0243 : Printed circuits associated with mounted high frequency components
• CPC Class Codes: H05K 1/183 : Components mounted in and supported by recessed areas of the printed circuit board
• CPC Class Codes: H05K 2201/09845 : Stepped hole, via, edge, bump or conductor
• CPC Class Codes: H05K 2201/10515 : Stacked components
• CPC Class Codes: H05K 2201/10727 : Leadless chip carrier [LCC], e.g. chip-modules for cards
• CPC Class Codes: H05K 2201/10969 : Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 2203/049 : Wire bonding

Abstract

The present invention relates to an arrangement concerned with multilayer printed circuit boards that enables cavities in said board to be utilized more effectively. A substrate (14) that includes a chip (16) which is connected to the microstrips (17) of the substrate (14) by means of bonding wires (18) is placed on a bonding shelf (13) with the chip (16) orientated towards the bottom of the cavity (6). The microstrips (17) on the substrate (14) therewith come into contact with the microstrips (12) on the bonding shelf (13). The earth plane (15) of the substrate (14) is connected to the upper earth plane (2) by means of bonding wires (19). The arrangement means that the cavity (16) is utilized effectively, at the same time as the substrate (14) protects the underlying chips (7, 16) against mechanical influences.

Claims

1. An arrangement comprising a multilayer printed circuit board that includes a cavity which encloses at least one first component which is connected electrically to a conductor in the multilayer printed circuit board, and a first substrate that includes at least one first earth plane and a first plurality of signal carrying conductors arranged so that the at least one first earth plane and the first plurality of signal carrying conductors are mutually separated by insulating surfaces, wherein a second component is connected electrically to the first plurality of signal carrying conductors by a plurality of electric contact conductors;

wherein the cavity is formed by gradually narrowing recesses in a number of the layers of the multilayer printed circuit board such that the cavity includes at least a first shelf on which a second plurality of signal carrying conductors and at least one second earth plane are disposed; and

wherein the first substrate is arranged on and fixed to the first shelf so that the signal carrying conductors and the at least one first earth plane on the first substrate contact corresponding ones of the second plurality of signal carrying conductors and the at least one second earth plane on the first shelf.

2. An arrangement according to claim 1, wherein the second component has a free upper side that faces towards the bottom of the cavity.

3. An arrangement according to claim 1, wherein the first substrate also includes a second earth plane.

4. An arrangement according to claim 3, wherein the second earth plane is earthed by electric contact with an earth plane on one free side of the multilayer printed circuit board by a number of electrical contact conductors.

5. An arrangement according to claim 3, wherein the second earth plane is earthed by electric contact with the at least one first earth plane on the first substrate by a number of conductive vias through the first substrate.

6. An arrangement according to claim 1, wherein the first substrate includes a third component that is arranged so that the second and third components are located on mutually opposite sides of the first substrate.

7. An arrangement according to claim 1, further comprising a second substrate having generally the same appearance as the first substrate, wherein the cavity further includes a second shelf located further from the bottom of the cavity than said first substrate and wherein the second substrate is disposed on the second shelf.