Distributed type switching system

• US 6,335,934 B1
• Filed: 08/13/1999
• Issued: 01/01/2002
• Est. Priority Date: 09/16/1986
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Kato, Takao, Kuwahara, Hiroshi, Gohara, Shinobu, Sakurai, Yoshito, Ohtsuki, Kenichi, Amada, Eiichi
• Primary Examiner(s): Olms, Douglas
• Assistant Examiner(s): HOM, SHICK C
• Application Number:
  US09/373,599
• Time in Patent Office: 872 Days
• Field of Search: 370/355, 370/369, 370/384, 370/389, 370/390, 370/392, 370/395, 370/396, 370/400, 370/371, 370/414, 370/416, 370/418, 370/424, 370/427, 370/445, 370/412
• US Class Current: 370/355
• CPC Class Codes: H04J 2203/0012 Switching modules and their interconnections
• CPC Class Codes: H04L 12/56 Packet switching systems
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 12/6402 Hybrid switching fabrics
• CPC Class Codes: H04L 2012/5651 Priority, marking, classes
• CPC Class Codes: H04L 2012/5652 Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 2012/6481 Speech, voice
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/106 using space switching, e.g. crossbar or matrix
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/1553 Interconnection of ATM switching modules, e.g. ATM switching fabrics
• CPC Class Codes: H04L 49/1584 Full Mesh, e.g. knockout
• CPC Class Codes: H04L 49/205 Quality of Service based
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/255 Control mechanisms for ATM switching fabrics
• CPC Class Codes: H04L 49/256 Routing or path finding in ATM switching fabrics
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/3018 : Input queuing
• CPC Class Codes: H04L 49/3081 : ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/309 : Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/35 : Switches specially adapted for specific applications
• CPC Class Codes: H04Q 11/0407 : using a stored programme control
• CPC Class Codes: H04Q 11/0421 : Circuit arrangements therefor
• CPC Class Codes: H04Q 11/06 : Time-space-time switching

Abstract

A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.

Claims

1. A switching system comprising:

a plurality of first modules each of which operates to determine a destination of received information, perform a switching operation thereon, and add a header indicating said destination to said information so as to output said information with said header appended thereto;

a second module having a space switch, said space switch interconnecting said plurality of first modules, said second module delivering information received from one of said first modules to said destination based on said header; and

a collision preventing circuit which controls information transmission and reception timings so that information from said plurality of first modules do not collide against each other in said space switch.

2. The switching system according to claim 1, wherein information transfer among said plurality of first modules and second module are performed by multiplexing said information on a predetermined frame and said collision preventing circuit controls an input timing of said information to said space switch.

3. A switching system comprising:

a plurality of first modules each of which operates to determine a destination of information received from an associated incoming line, perform a switching operation thereon, and add thereto a header indicating the destination so as to deliver said received information with the header appended thereto;

second module having a space switch, said second module switching and outputting information from said plurality of first modules based on the header;

a plurality of third modules each of which determines destination of information received from said second module, and switches the received information, and removes the header therefrom to output information received by the plurality of first modules to destination outgoing lines; and

a collision preventing circuit which controls information transmission and reception timings so that information from the plurality of first modules do not collide with each other in said space switch of said second module.

4. The switching system according to claim 3, wherein transfer of information among said plurality of first modules, second module, and plurality of third modules is performed by multiplexing said information on a predetermined frame and said collision preventing circuit controls input timing of said information to said space switch.

5. A switching system comprising:

a plurality of first modules each of which has a memory for storing received information and a controller to determine a destination of the received information, switch the received information and add a header indicating the destination to said received information so as to output said information with said header added thereto;

a second module having a space switch which interconnects said plurality of first modules, said second module outputting said received information from one of said first modules to said destination based on said header; and

a collision preventing circuit which controls information transmission and reception timings so that information from said plurality of first modules do not collide with one another in said space switch of said second module.

6. A switching system comprising:

a plurality of first switching modules each of which has a first controller to determine a destination of a received information from an incoming line and a first memory for storing said received information, switch said received information, and append a header indicating the destination to said received information to output said received information with said header appended thereto;

a second module having a space switch which switches and outputs information from said plurality of first switching modules based on the header;

a plurality of third modules each of which has a second controller to determine said destination of information received by said plurality of first switching modules and a second memory for storing said received information, switch said received information, and remove the header therefrom so as to deliver information received by said plurality of first switching modules to destination outgoing lines; and

a collision preventing circuit which controls information transmission and reception timing so that information from said plurality of first switching modules do not collide against each other in said space switch.