Single chip CMOS transmitter/receiver
First Claim
1. A communication system, comprising:
- a receiver unit that receives signals including selected signals having a carrier frequency;
a single PLL that generates more than two multi-phase clock signals having a frequency different from the carrier frequency, wherein the multi-phase clock signals are combined to generate a plurality of local oscillator signals having a second frequency higher than the frequency; and
a demodulation-mixer that mixes the received selected signals with the more than two multi-phase clock signals to output the selected signals having a frequency reduced by the carrier frequency, wherein each of the local oscillator signals demodulate one of an I carrier frequency signal and a Q carrier frequency signal.
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Abstract
A single chip RF communication system and method is provided including a transmitter and a receiver. The RF communication system in accordance with the present invention includes an antenna for receiving transmitting RF signals, a PLL for generating multi-phase clock signals having a frequency different from a carrier frequency in response to the multi-phase clock signals and a reference signal having the carrier frequency, a demodulation-mixing unit for mixing the received RF signals with the multi-phase clock signals having the frequency different from the carrier frequency to output the RF signals having a frequency reduced by the carrier frequency and an A/D converting unit for converting the RF signals from the mixing unit into digital signals.
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Citations
32 Claims
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1. A communication system, comprising:
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a receiver unit that receives signals including selected signals having a carrier frequency;
a single PLL that generates more than two multi-phase clock signals having a frequency different from the carrier frequency, wherein the multi-phase clock signals are combined to generate a plurality of local oscillator signals having a second frequency higher than the frequency; and
a demodulation-mixer that mixes the received selected signals with the more than two multi-phase clock signals to output the selected signals having a frequency reduced by the carrier frequency, wherein each of the local oscillator signals demodulate one of an I carrier frequency signal and a Q carrier frequency signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22)
a modulation mixer that mixes the multi-phase clock signals, which operate as the local oscillator signals, with transmission data to modulate the transmission data; and
a power amplifier that amplifies the modulated transmission data and transmits the data to the transceiver for transmission.
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6. The communication system of claim 1, further comprising:
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a RF filter coupled to the receiver unit that filters the received selected signals;
a low noise amplifier coupled to the RF filter that amplifies the filtered selected signals with a gain; and
a low pass filter coupled to the demodulation mixer that filters the selected signals having the frequency reduced by the carrier frequency.
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7. The communication system as claimed in claim 1, further comprising:
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an A/D converting unit that converts the selected signals from the demodulation-mixer into digital signals; and
a discrete-time signal processing unit that receives the digital signals.
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8. The communication system of claim 1, wherein the communication system is a RF receiver portion, wherein the selected signals are RF signals, wherein the multi-phase clock signals have a frequency of (2*carrier frequency/N) where N is a positive integer greater than two, and wherein the RF communication system is formed on a single CMOS chip.
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9. The communication system of claim 1, wherein the RF communication system is operated with the carrier frequency greater than 1 GHz.
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18. The communication system of claim 1, wherein the demodulation mixer comprises a first mixer array and a second mixer array, each of the first and second mixer arrays including a plurality of multiple input mixers.
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19. The communication system of claim 1, wherein the demodulation mixer comprises a first mixer array and a second mixer array, each of the first and second mixer arrays having a plurality of mixer stages, each of the mixer stages having at least one multiple input mixer.
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20. The communication system of claim 19, wherein output signals from the at least one multiple input mixer of a first of the plurality of stages are input into at least one multiple input mixer of a second of the plurality of stages.
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21. The communication system of claim 1, wherein the more than two multi-phase clock signals comprise a plurality of pairs of multi-phase clock signals, each of the plurality of pairs including an I carrier frequency signal and a Q carrier frequency signal.
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22. The communication system of claim 1, wherein a reference signal is formed by combining the more than two multi-phase clock signals.
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10. A single chip RF communication system, comprising:
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a transceiver for receiving and transmitting RF signals;
a single PLL for generating a plurality of 2N-phase clock signals having a substantially identical frequency 2*f0/N smaller than a carrier frequency fo, wherein N is a positive integer as a phase number;
a demodulation mixing unit for mixing the RF signals from the transceiver with the plurality of 2N-phase clock signals from the PLL to output the RU signals having a frequency reduced by the carrier frequency, wherein the demodulation mixer comprises a plurality of two input mixers, wherein the plurality of 2N-phase clock signals are combined to demodulate at least one of an I carrier frequency signal and a Q carrier frequency signal; and
an A/D converting unit for converting the RF signals from the demodulation mixing unit into digital signals. - View Dependent Claims (11, 12, 13, 23, 24, 25, 26, 27, 30)
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14. A method of operating a RF communication system, comprising:
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receiving signals including selected signals having a carrier frequency;
generating more than two multi-phase clock signals each having a substantially identical frequency different from the carrier frequency, wherein the multi-phase clock signals are combined to generate a plurality of local oscillator signals having a second frequency higher than the frequency; and
mixing the received carrier frequency selected signals with the more than two multi-phase clock signals to output demodulated selected signals having a frequency reduced from the carrier frequency so that corresponding ones of the local oscillator signals combined from the more than two multi-phase clock signals demodulate one of a first carrier frequency signal and a second carrier frequency signal. - View Dependent Claims (15, 16, 17, 28, 29)
RF filtering the received selected signals;
amplifying the filtered selected signals with a gain; and
low pass filtering the demodulated selected signals having the frequency reduced to baseband;
A/D converting the low pass filtered frequency reduced selected signals into digital signals; and
discrete-time signal processing the digital signals.
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17. The method of claim 14, further comprising:
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modulation mixing the multi-phase clock signals combined as the local oscillator signals with transmission data to modulate the transmission data; and
power amplifying the modulated transmission data and transmitting the data to the transceiver for transmission.
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28. The method of claim 14, further comprising combining the more than two multi-phase clock signals to form a reference signal.
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29. The method of claim 14, wherein the RF communication system is formed using CMOS technology and operates with the carrier frequency greater than 1 GHz.
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31. A communication system, comprising:
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receiving means for receiving signals including selected signals having a carrier frequency;
single PLL means for generating more than two multi-phase clock signals having a first frequency smaller than the carrier frequency; and
demodulation-mixer means for combining the multi-phase clock signals to form a plurality of local oscillator signals that each have a second frequency higher than the first frequency and for mixing with the received selected signals to output the selected signals having a frequency reduced from the carrier frequency, wherein the local oscillator signals demodulate corresponding ones of an I carrier frequency signal and a Q carrier frequency signal.
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32. A single chip RF communication system, comprising:
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transceiver means for receiving and transmitting RF signals;
single PLL means for generating a plurality of 2N-phase clock signals having a substantially identical frequency 2*f0/N smaller than a carrier frequency fo, wherein N is a positive integer as a phase number; and
demodulation mixing means for mixing the RF signals from the transceiver means with the plurality of 2N-phase clock signals from the PLL means to output the RF signals having a frequency reduced by the carrier frequency, wherein the demodulation mixer means comprises a first plurality of two input mixer means and a second plurality of two input mixer means, wherein the plurality of 2N-phase clock signals are combined to demodulate at least one of an I carrier frequency signal and a Q carrier frequency signal.
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Specification