Receiver for simultaneously displaying signals having different display formats and/or different frame rates and method thereof

• US 6,337,716 B1
• Filed: 12/08/1999
• Issued: 01/08/2002
• Est. Priority Date: 12/09/1998
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Yim, Myung-sik
• Primary Examiner(s): HSIA, SHERRIE Y
• Application Number:
  US09/456,498
• Time in Patent Office: 762 Days
• Field of Search: H04/N.544, H04/N.327, H04/N.546, H04/N.701, 348/553, 348/554, 348/555, 348/556, 348/558, 348/441, 348/446, 348/458, 348/563, 348/564, 348/565
• US Class Current: 348/554
• CPC Class Codes: H04N 21/440218 by transcoding between formats or standards, e.g. from MPEG-2 to MPEG-4 conversion of standards in analogue television systems H04N7/01
• CPC Class Codes: H04N 21/440281 by altering the temporal resolution, e.g. by frame skipping television signal recording using magnetic recording on tape for reproducing at a rate different from the recording rate H04N5/783
• CPC Class Codes: H04N 21/44029 for generating different versions
• CPC Class Codes: H04N 5/46 for receiving on more than one standard at will deflecting circuits of multi-standard receivers H04N3/27
• CPC Class Codes: H04N 7/0125 one of the standards being a high definition standard

Abstract

A receiver for simultaneously displaying signals having different display formats and/or different frame rates, and a method thereof are provided. The receiver includes a signal generator, a first display processor, and a second display processor. The signal generator generates a first vertical synchronous signal for a high definition (HD) image, a first field identification signal for coping with a case in which an HD image is an interlace image, a second vertical synchronous signal for a standard image, and a second field identification signal for a standard image. The first display processor processes a received HD decoded image to an HD display format according to the first vertical synchronous signal and the first field identification signal. The second display processor down-samples the HD decoded image using the first and second vertical synchronous signals and the first and second field identification signals, and provides a standard definition (SD) image signal having a standard display format that is different from the HD display format. Accordingly, the receiver can simultaneously reproduce a high definition signal and a standard definition image signal corresponding to the picture quality of TVs which have already been commonly used, the two signals having different display formats and/or different frame rates.

Claims

1. A receiver comprising:

a signal generator for generating a first vertical synchronous signal for a high definition (HD) image, a first field identification signal for an interlace HD image, a second vertical synchronous signal for a standard image, and a second field identification signal for a standard image;

a first display processor for processing a received HD decoded image to an HD display format according to the first vertical synchronous signal and the first field identification signal; and

a second display processor for down-sampling the HD decoded image using the first and second vertical synchronous signals and the first and second field identification signals, and providing a standard definition (SD) image signal having a standard display format that is different from the HD display format.

2. The receiver of claim 1, further comprising:

a decoder for decoding a received HD video bitstream and providing an HD decoded image;

a frame memory for storing the HD decoded image, from which data is simultaneously read by the first and second display processors, wherein the first display processor reads data in units of a frame or a field, and the second display processor reads data in units of a field; and

a field buffer for temporarily storing the field data of an SD image which has been processed by the second display processor.

3. The receiver of claim 1, wherein the second display processor comprises:

an SD display controller for generating a down-sampling on/off signal by calculating the difference in time between the first and second vertical synchronous signals, and generating a first control signal representing whether the received HD decoded image is a progressive image or an interlace image, and a second control signal representing SD output image field information;

a down sampler for down-sampling the HD decoded image into an SD display format signal according to the down-sampling on/off signal and the first and second control signals; and

a standard image signal generator for generating the output of the down sampler as a standard image signal according to the second vertical synchronous signal and the second field identification signal.

4. The receiver of claim 3, wherein the down sampler performs no down-sampling when the temporal difference between the first and second vertical synchronous signals is a predetermined duration, and performs down-sampling in all other cases.

5. The receiver of claim 3, wherein the down sampler comprises:

a horizontal down sampler for horizontally down-sampling the received HD decoded image according to the down-sampling on/off signal and providing a horizontally down-sampled signal;

a line memory for storing the horizontally down-sampled signal in units of a line; and

a vertical down sampler for receiving the horizontally down-sampled signal and the previous horizontally down-sampled signal stored in the line memory, and vertically down-sampling the received signals according to the down-sampling on/off signal, the first and second control signals, and the second vertical synchronous signal.

6. The receiver of claim 5, wherein the vertical down sampler performs vertical down-sampling by interpolating the horizontally down-sampled signal which is provided from the horizontal down sampler, and the previous horizontally down-sampled signal which is provided from the line memory.

7. The receiver of claim 5, wherein the vertical down sampler vertically down-samples the horizontally down-sampled signal which is provided from the horizontal down sampler.

8. The receiver of claim 1, wherein the receiver is a high definition television.

9. The receiver of claim 1, wherein the receiver is a standard definition television having a set-top box.

10. The receiver of claim 1, wherein the standard image signal is a PAL signal, and the second synchronous signal has a period of 50 Hz.

11. The receiver of claim 1, wherein the standard image signal is an NTSC signal, and the second synchronous signal has a period of 60 Hz.

12. A method of simultaneously displaying signals having different display formats and/or different frame rates, the method comprising the steps of:

(a) decoding a received high definition (HD) image and providing an HD decoded image;

(b) processing the HD decoded image to an HD display format according to a first vertical synchronous signal and a first field identification signal for an interlace HD image; and

(c) down-sampling the HD decoded image using the first vertical synchronous signal for an HD image, the first field identification signal for an HD image, a second vertical synchronous signal for a standard image, and a second field identification signal for a standard image, and providing a standard image signal having a standard display format that is different from the HD display format.

13. The method of claim 12, wherein the step (c) comprises the substeps of:

(c1) calculating the temporal difference between the first and second vertical synchronous signals and generating a down-sampling on/off signal;

(c2) generating a first control signal representing whether the HD image is a progressive or interlace image, and a second control signal representing the information on the field of a standard definition (SD) output image, on the basis of the first and second vertical synchronous signals and the first and second field identification signals;

(c3) down-sampling the HD decoded image to an SD display format signal according to the down-sampling on/off signal and the first and second control signals, and providing a down-sampled signal; and

(c4) outputting the down-sampled signal as a standard image signal according to the second vertical synchronous signal and the second field identification signal.

14. The method of claim 13, wherein in the step (c3), down-sampling is not performed when the temporal difference between the first and second vertical synchronous signals is a predetermined duration.

15. The method of claim 13, wherein the step (c3) comprises the substeps of:

(c3-1) horizontally down-sampling the HD decoded image according to the downsampling on/off signal and providing a horizontally-downsampled signal;

(c3-2) delaying the horizontally-downsampled signal by one line and providing a delayed horizontally-downsampled signal; and

(c3-3) vertically down-sampling the horizontally down-sampled signal and the delayed horizontally down-sampled signal according to the down sampling on/off signal, the first and second control signals, and the second vertical synchronous signal.

16. The method of claim 15, wherein in the step (c3-3), the horizontally down-sampled signal and the delayed horizontally down-sampled signal are interpolated and vertically down-sampled.

17. The method of claim 15, wherein in the step (c3-3), the horizontally down-sampled signal is directly vertically down-sampled without processing.

18. The method of claim 12, wherein the standard image signal is a PAL signal, and the second synchronous signal has a period of 50 Hz.

19. The method of claim 12, wherein the standard image signal is an NTSC signal, and the second synchronous signal has a period of 60 Hz.