System including single connector pin supporter having two separate plurality of connector pins with one set of pins contacting state designating portion of memory card indicating write prohibit state

• US 6,338,104 B1
• Filed: 09/08/2000
• Issued: 01/08/2002
• Est. Priority Date: 02/03/1995
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Iwasaki, Hiroshi
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): Perveen, Rehana
• Application Number:
  US09/658,189
• Time in Patent Office: 487 Days
• Field of Search: 386/125, 360/133, 439/74, 439/83, 439/876, 439/540.1, 710/36, 710/37, 711/100
• US Class Current: 710/36
• CPC Class Codes: G11C 7/16 Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: G11C 7/24 Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
• CPC Class Codes: G11C 8/20 Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Abstract

In a small and thin memory module for sharing data among electronic devices such as information processing apparatuses, a write prohibit state can be visually recognized. A conductive seal is attached to a predetermined position on a support member, thereby setting the memory module in the write prohibit state. The conductive seal visually indicates the write prohibit state. When the memory module is mounted in a connector section of a card-shaped holder, connector pins are electrically connected to each other via the conductive seal. Thus, a write prohibit mechanism is realized at low cost.

Claims

1. An information processing apparatus for use in receiving an information storage device that includes a semiconductor storage medium with a first portion having an external connection terminal and a second portion including a state-designating portion for designating a state in which writing of information to the semiconductor storage medium is prohibited, the information processing apparatus comprising:

an external support member having a cavity therein, at least one side wall of the external support member having an opening for receiving the information storage device;

a plurality of first connector pins, positioned in the cavity, for providing an electrical connection with the information storage device, to retrieve the information from the semiconductor storage medium;

a plurality of second connector pins, positioned in the cavity, for providing a contact with the state-designating portion, a physical position of the plurality of second connector pins with respect to the opening being closer than a physical position of the plurality of first connector pins with respect to the opening; and

a discriminating circuit operably coupled to the plurality of second connector pins for discriminating whether writing information to the semiconductor storage medium is prohibited by detecting conductive/non-conductive state between the plurality of connector pins.

2. The information processing apparatus according to claim 1, wherein the plurality of second connector pins comprise at least two electrodes arranged at a distance of at least approximately 1 mm.

3. The information processing apparatus according to claim 2, further comprising a memory controller to control writing and reading data to the semiconductor storage medium.

4. The information processing apparatus according to claim 3, wherein the memory controller is capable of controlling a NAND flash EEPROM as the semiconductor storage medium.

5. The information processing apparatus according to one of claims 2 and 4, wherein a cross section of at least one of the plurality of first connector pins represents a rounded portion and a straight portion.

6. The information processing apparatus according to one of claims 2 and 4, wherein a cross section of at least one of the plurality of second connector pins represents a rounded portion and a straight portion.

7. A connector pin assembly for use in an information processing apparatus for receiving a memory card, the memory card having a state designating portion for designating whether or not writing of information to the memory card is prohibited, the connector pin assembly comprising:

a connector pin supporter;

a plurality of first connector pins, supported by the connector pin supporter, the plurality of first connector pins being adapted to establish contact with a plurality of respective external connection terminals of the memory card; and

a plurality of second connector pins, supported by the connector pin supporter, the plurality of second connector pins being adapted to establish contact with the state designating portion.

8. The connector pin assembly according to claim 7, wherein the contact between the plurality of first connector pins and the plurality of respective external connection terminals includes an electrical contact.

9. The connector pin assembly according to claim 7, wherein the contact between the plurality of second connector pins and the state designating portion includes a physical contact.

10. The connector pin assembly according to claim 7, wherein the plurality of second connector pins are at least two electrodes arranged at a distance of at least approximately 1 mm.

11. The connector pin assembly according to claim 10, wherein a cross section of at least one of the plurality of first connector pins represents a rounded portion and a straight portion.

12. The connector pin assembly according to claim 10, wherein a cross section of at least one of the plurality of second connector pins represents a rounded portion and a straight portion.

13. The connector pin assembly according to claim 7, wherein the connector pin supporter have an opening to receive the memory card, and a physical position of the plurality of second connector pins with respect to the opening is closer than a physical position of the plurality of first connector pins with respect to the opening.