Molding method for BGA semiconductor chip package

• US 6,338,813 B1
• Filed: 10/15/1999
• Issued: 01/15/2002
• Est. Priority Date: 10/15/1999
• Status: Expired due to Term

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Hsu, Kao-Yu, Chen, Tao-Yu, Lin, Chun Hung
• Primary Examiner(s): ORTIZ, ANGELA Y
• Application Number:
  US09/418,569
• Time in Patent Office: 823 Days
• Field of Search: 264/272.14, 264/272.15, 264/272.17, 298/41, 298/48, 298/49, 425/116, 425/544, 438/112, 438/127
• US Class Current: 264/272.14
• CPC Class Codes: B29C 45/14655 connected to or mounted on a carrier, e.g. lead frame
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A molding method for a BGA semiconductor chip package comprising a substrate supporting an array of chips having two lines of bonding pads formed at two respective side thereof. The molding method comprises the steps of: (A) providing a molding apparatus comprising a molding die having a molding cavity and at least two runners connected to the molding cavity; (B) closing and clamping the molding die in a manner that the chips are located in the molding cavity thereof; (C) transferring a molding compound into the molding cavity wherein each chip is arranged in a manner that the two lines of bonding pads thereof are substantially perpendicular to the flowing direction of the molding compound; (D) curing the molding compound; and (E) unclamping and opening the molding die to take out the molded product.

Claims

1. A molding method for a BGA semiconductor chip package comprising a substrate supporting an array of chips each having only two lines of bonding pads formed at two opposing sides thereof, the molding method comprising the steps of:

providing a molding apparatus comprising a molding die having a molding cavity and at least a runner connected to the molding cavity;

closing and clamping the molding die in a manner that the chips are located in the molding cavity thereof;

transferring a molding compound into the molding cavity wherein each chip is arranged in a manner that the two lines of bonding pads thereof are substantially perpendicular to the flowing direction of the molding compound;

hardening the molding compound; and

unclamping and opening the molding die to remove the molded product.

2. The molding method as claimed in claim 1, wherein the molding apparatus further comprises a molding pressure balancing device for providing interconnection between the runners thereby balancing the pressure of molding compound inside each runner whereby the molding compound can be transferred into the molding cavity more evenly.

3. The molding method as claimed in claim 1, wherein the molding apparatus comprises a plurality of pots connected the runners for receiving the molding compound and the molding apparatus further comprises a connection pipe for providing interconnection between the pots thereby balancing the pressure of molding compound inside each pot.

4. The molding method as claimed in claim 1, wherein the molding apparatus comprises multiple runners connected to the molding cavity of the molding die, each of said multiple runners is aligned with a row of the array of chips.

5. The molding method as claimed in claim 1, wherein the substrate further comprises a degating region on the surface thereof at a location such that the edges of the runners fit entirely within the degating region during encapsulation of the chip package, and the degating region has a degating region material formed thereon.

6. The molding method as claimed in claim 5, wherein the degating region material is gold.

7. The molding method as claimed in claim 1, wherein the BGA semiconductor chip package is a stacked chip package device.

8. A method of forming a molded semiconductor chip package, comprising the steps of:

providing a semiconductor chip package including a substrate supporting an array of chips, each of said chips being connected to the substrate by a plurality of bonding wires contained in substantially parallel planes;

providing a molding apparatus including a molding cavity communicated with at least one runner channel;

placing the semiconductor chip package in said molding cavity so that the planes containing the bonding wires of said chips are substantially parallel to a longitudinal direction of said at least one runner channel;

transferring a molding compound through said at least one runner channel into the molding cavity;

curing the molding compound; and

removing the molded semiconductor chip package after the molding material is cured.