Wide band IQ splitting apparatus and calibration method therefor with balanced amplitude and phase between I and Q
First Claim
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1. A wide band IQ splitting apparatus comprising:
- a quadrature oscillator for generating a pair of quadrature signals, an analog IQ splitter including a mixer for mixing an analog input signal with the pair of quadrature signals for splitting the analog input signal into analog I and Q signals of which bandwidths are reduced to approximately half relative to that of the analog input signal before analog to digital conversion, an amplitude and phase adjuster for adjusting relative amplitude and relative phase of the pair of quadrature signals in order to adjust imbalance of the amplitude and the phase of the analog I and Q signals from the analog IQ splitter, a first analog to digital converter for converting the analog I signal of which the bandwidth is approximately the half bandwidth of the analog input signal into a digital I signal, a second analog to digital converter for converting the analog Q signal of which the bandwidth is approximately the half bandwidth of the analog input signal into a digital Q signal, and a processor for receiving the digital I and Q signals and for compensating imbalance of amplitude and phase between the digital I and Q signals by using compensation data.
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Abstract
The present invention provides a wide band IQ splitting apparatus suitable for using in a spectrum analyzer. A quadrature oscillator 30 generates a pair of quadrature signals. An amplitude and phase adjuster 32 receives the quadrature signals and adjusts the balances of the amplitude and the phase between them. An analog splitter 20 mixes an analog IF signal with the pair of quadrature signals for splitting the analog IF signal into analog I and Q signals. First and second analog to digital converters 22 and 24 convert the analog I and Q signals into digital I and Q signals, respectively. A control and processing circuit detects the imbalances of the amplitude and phase between the digital I and Q signals for controlling the amplitude and phase adjuster 32. The amplitude and phase adjuster 32 is previously calibrated. For this first calibration, the analog splitter 20 receives a first calibration signal instead of the analog IF signal. The first calibration signal has a known amplitude and a known frequency slightly different from the frequency of the quadrature signals. Then the control and processing circuit 26 detects the imbalance of the amplitude and/or the phase of the digital I and Q signals and controls the amplitude and phase adjuster 32 properly. The control and processing circuit 26 also produces compensation data. The analog splitter 20 receives a second calibration signal instead of the analog input signal. The frequency of the second calibration signal varies within the band of the analog IF signal. The control and processing circuit 26 calculates the compensation data at a plurality of the frequencies of the calibration signal and a memory stores the compensation data. The compensation data are used to produce compensated frequency domain data, and then compensated time domain data are made from the compensated frequency domain data.
84 Citations
20 Claims
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1. A wide band IQ splitting apparatus comprising:
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a quadrature oscillator for generating a pair of quadrature signals, an analog IQ splitter including a mixer for mixing an analog input signal with the pair of quadrature signals for splitting the analog input signal into analog I and Q signals of which bandwidths are reduced to approximately half relative to that of the analog input signal before analog to digital conversion, an amplitude and phase adjuster for adjusting relative amplitude and relative phase of the pair of quadrature signals in order to adjust imbalance of the amplitude and the phase of the analog I and Q signals from the analog IQ splitter, a first analog to digital converter for converting the analog I signal of which the bandwidth is approximately the half bandwidth of the analog input signal into a digital I signal, a second analog to digital converter for converting the analog Q signal of which the bandwidth is approximately the half bandwidth of the analog input signal into a digital Q signal, and a processor for receiving the digital I and Q signals and for compensating imbalance of amplitude and phase between the digital I and Q signals by using compensation data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
providing a first calibration signal to the analog IQ splitter, the first calibration signal having a known amplitude and a known frequency slightly different from the frequency of the pair of quadrature signals, splitting the first calibration signal into analog I and Q signals, digitizing the analog I and Q signals to digital I and Q signals, detecting imbalance of the amplitude and the phase between the digital I and Q signals derived from the first calibration signal, and controlling the amplitude and phase adjuster to adjust relative amplitude and relative phase of the pair of quadrature signals to correct the imbalance of the amplitude and phase between the digital I and Q signals.
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13. A calibration method according to claim 12, wherein the frequency difference between the frequency of the first calibration signal and the frequency of the quadrature signals is small enough that group delay can be neglected and large enough for the processor to detect the frequency difference.
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14. A calibration method according to claim 12, wherein the detecting and controlling steps have steps of transforming the digital I and Q signals into frequency domain data, detecting a side band in the frequency domain data, and controlling the amplitude and phase adjuster so as to suppress the side band.
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15. A calibration method according to claim 12, further comprising steps of:
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providing a second calibration signal to the analog IQ splitter, the second calibration signal having a known amplitude and a known frequency, splitting the second calibration signal into analog I and Q signals, digitizing the analog I and Q signals to digital I and Q signals, calculating the compensation data at the frequency of the second calibration signal from the digital I and Q signals derived from the second calibration signal, storing the compensation data in a memory, varying the frequency of the second calibration signal selectively within the band of the analog input signal until sufficient compensation data are acquired.
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16. A calibration method according to claim 15, wherein the second calibration signal has an initial frequency at one end of the band of the analog input signal, and the varying step comprises varying the frequency of the second calibration signal step-by-step until the frequency of the second calibration signal reaches the other end of the band of the analog input signal.
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17. A calibration method according to claim 16, wherein each frequency step of the second calibration signal is small enough that group delay can be neglected and large enough that the processor can detect the frequency difference.
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18. A calibration method for the wide band IQ splitting apparatus according to claim 1, comprising steps of:
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providing a calibration signal to the analog IQ splitter, the calibration signal having a known amplitude and a known frequency, splitting the calibration signal into analog I and Q signals, digitizing the analog I and Q signals to digital I and Q signals, calculating the compensation data at the frequency of the calibration signal from the digital I and Q signals derived from the calibration signal, storing the compensation data in a memory, varying the frequency of the calibration signal selectively within the band of the analog input signal until sufficient compensation data are acquired.
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19. A calibration method for the wide band IQ splitting apparatus according to claim 1, comprising steps of:
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providing a calibration signal to the analog IQ splitter, the calibration signal having a known amplitude and a known frequency of one end of the band of the analog input signal, splitting the calibration signal into analog I and Q signals, digitizing the analog I and Q signals to digital I and Q signals, calculating the compensation data at the frequency of the calibration signal from the digital I and Q signals derived from the calibration signal, storing the compensation data in a memory, varying the frequency of the calibration signal step-by-step until the frequency of the calibration signal reaches the other end of the band of the analog input signal.
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20. A calibration method according to claim 19, wherein each frequency step of the second calibration signal is small enough that group delay can be neglected and large enough that the processor can detect the frequency difference.
Specification
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Current AssigneeSony/Tektronix Corporation (Fortive Corp.)
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Original AssigneeSony/Tektronix Corporation (Fortive Corp.)
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InventorsKoyota, Hideaki, Nara, Akira
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Primary Examiner(s)Brown, Glenn W.
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Assistant Examiner(s)Hamdan, Wasseem H.
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Application NumberUS09/386,652Time in Patent Office875 DaysField of Search324/601, 324/650, 324/638, 324/76.78, 324/76.19, 324/76.23, 324/76.29, 324/76.55, 324/76.82, 455/192.2, 375/235US Class Current324/76.78CPC Class CodesG01R 23/16 Spectrum analysis; Fourier ...G01R 35/00 Testing or calibrating of a...H03D 3/009 Compensating quadrature pha...
