Stacked semiconductor package with flexible tape

• US 6,344,683 B1
• Filed: 09/10/1999
• Issued: 02/05/2002
• Est. Priority Date: 03/09/1999
• Status: Expired due to Term

• Current Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Kim, Sun-Dong
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US09/393,184
• Time in Patent Office: 879 Days
• Field of Search: 257/676, 257/686, 257/690, 257/777-781, 257/783
• US Class Current: 257/686
• CPC Class Codes: H01L 2225/0652 Bump or bump-like direct electrical connections from substrate to substrate
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06575 Auxiliary carrier between devices, the carrier having no electrical connection structure
• CPC Class Codes: H01L 2225/06579 TAB carriers; beam leads
• CPC Class Codes: H01L 2225/06589 Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A stacked semiconductor package is formed by forming a semiconductor wafer having a plurality of semiconductor chips with chip pads on their upper sides, where the chips are arranged in pairs; sawing the wafer along edges of the semiconductor chips; adhering a bonding tape to adjacent pairs of the semiconductor chips, wherein conductive interconnections on the bonding tape electrically couple corresponding chip pads of adjacent chips; cutting the bonding tape so that only adjacent pairs of the chips remain attached to one another; and stacking the adjacent pairs of semiconductor chips so that the upper sides of the chips are substantially parallel. The method may include an additional step of adhering a plurality of solder balls on the bonding tape to serve as external leads of the package. Further, the adjacent pairs of semiconductor chips may be attached to opposite sides of a heat conducting plate which serves to dissipate heat generated by the chips.

Claims

1. A semiconductor package, comprising:

first and second semiconductor chips, each having a first side, wherein a plurality of chip pads are formed on the first side of each of the semiconductor chips, and wherein the first and second semiconductor chips are oriented such that the first sides are internally positioned and face one another; and

a flexible bonding tape attached to the first sides of the first and second semiconductor chips, wherein conductive interconnections of the flexible bonding tape electrically couple respective ones of the chip pads on the first and second semiconductor chips, and wherein a portion of the bonding tape not adhered to the first and second semiconductor chips is externally exposed.

2. The package according to claim 1, further comprising a heat conducting plate positioned between and attached to the first and second semiconductor chips.

3. The semiconductor package of claim 2, further comprising non-conductive adhesive layers that attach the first and second semiconductor chips to opposite sides of the heat conducting plate.

4. The semiconductor package of claim 2, wherein the heat conducting plate is positioned between the first and second semiconductor chips so that it does not contact the flexible bonding tape.

5. The semiconductor package of claim 2, further comprising a molding compound that is positioned in a space between the flexible bonding tape, the first and second semiconductor chips, and the heat conducting plate.

6. The semiconductor package of claim 1, wherein portions of the plurality of conductive interconnections of the flexible bonding tape are plated with an electrically conductive material.

7. The semiconductor package of claim 6, wherein the electrically conductive material is silver.

8. The semiconductor package of claim 1, further comprising a plurality of conductive media that are attached to the flexible bonding tape, and that form external leads of the package.

9. The semiconductor package of claim 8, wherein the conductive media are solder balls.

10. A semiconductor package, comprising:

first and second chips having first and second surfaces, wherein the chips are oriented such that the first surfaces are externally positioned and the second surfaces are internally positioned to face each other; and

a flexible adhesive having conductive portions that electrically couples the first surfaces of the first and second chips at predetermined coupling regions.

11. The semiconductor package of claim 10, wherein the flexible adhesive is electrically isolated from the second surfaces of the first and second chips.

12. The semiconductor package of claim 10, wherein the flexible adhesive is a bonding tape.

13. The semiconductor package of claim 10, wherein the predetermined coupling regions are chip pads.

14. The semiconductor package of claim 10, further comprising a plurality of external leads formed on the conductive portions of the flexible adhesive, wherein the plurality of external leads are electrically conductive media.

15. The semiconductor package of claim 14, wherein the electrically conductive media are solder balls.

16. The semiconductor package of claim 10, wherein the conductive portions are conductive interconnections.

17. The semiconductor package of claim 16, wherein the conductive interconnections are plated with all electrically conductive material.

18. The semiconductor package of claim 10, further comprising a heat conductor that is positioned between the first and second chips.

19. The semiconductor package of claim 18, further comprising an insulating adhesive that attaches the heat conductor to one of the first and second sides of the first and second chips.

20. The semiconductor package of claim 18, wherein the heat conductor is a heat conducting plate.

21. The semiconductor package of claim 18, wherein the heat conductor is not in contact with the flexible adhesive.

22. The semiconductor package of claim 21, further comprising a molding compound that is positioned between the heat conductor, the first and second chips and the flexible adhesive.

23. A semiconductor package, comprising:

first and second semiconductor chips, each having a first side, wherein a plurality of chip pads are formed on the first side of each of the semiconductor chips;

a bonding tape attached to the first sides of the first and second semiconductor chips, wherein conductive interconnections of the bonding tape electrically couple respective ones of the chip pads on the first and second semiconductor chips; and

a heat conducting plate positioned between and attached to the first and second semiconductor chips.

24. The semiconductor package of claim 23, wherein the first and second semiconductor chips are positioned such that the first sides of each of the semiconductor chips are internally positioned, and wherein a portion of the bonding tape not adhered to the first and second semiconductor chips is externally exposed.

25. The semiconductor package of claim 23, wherein the first and second semiconductor chips are positioned such that the first sides of each of the semiconductor chips is externally exposed, and wherein portions of the bonding tape adhered to the first and second semiconductor chips are externally exposed.

26. The semiconductor package of claim 23, further comprising non-conductive adhesive layers that attach the first and second semiconductor chips to opposite sides of the heat conducting plate.

27. The semiconductor package of claim 23, wherein the heat conducting plate is positioned between the first and second semiconductor chips so that it does not contact the bonding tape.

28. The semiconductor package of claim 23, further comprising a molding compound that is positioned in a space between the bonding tape, the first and second semiconductor chips, and the heat conducting plate.

29. The semiconductor package of claim 23, further comprising a plurality of conductive media that are attached to the bonding tape, and that form external leads of the package.

30. The semiconductor package of claim 29, wherein the conductive media are solder balls.

31. A semiconductor package, comprising:

first and second semiconductor chips, each having a first side and a second opposite side, wherein a plurality of chip pads are formed on the first side of each of the semiconductor chips, and wherein the first and second semiconductor chips are oriented such that the second sides of each are internally positioned to face one another; and

a flexible bonding tape attached to the first sides of the first and second semiconductor chips, wherein conductive interconnections of the bonding tape electrically couple respective ones of the chip pads on the first and second semiconductor chips, and wherein portions of the bonding tape adhered to the first and second semiconductor chips are externally exposed.

32. The package according to claim 31, further comprising a heat conducting plate positioned between and attached to the first and second semiconductor chips.

33. The semiconductor package of claim 32, further comprising a molding compound that is positioned in a space between the bonding tape, the first and second semiconductor chips, and the heat conducting plate such that the heat conducting plate does not contact the bonding tape.

34. The semiconductor package of claim 31, further comprising a plurality of conductive media that are attached to the bonding tape, and that form external leads of the package.

35. The semiconductor package of claim 34, wherein the conductive media are solder balls.

36. A semiconductor package, comprising:

first and second chips having first and second opposite surfaces oriented such that the second surfaces of the chips are externally positioned and the first surfaces are internally positioned to face each other; and

a flexible adhesive having conductive portions that electrically couple the first surfaces of the first and second chips at predetermined coupling regions.

37. The semiconductor package of claim 36, wherein the flexible adhesive is a bonding tape.

38. The semiconductor package of claim 36, wherein the predetermined coupling regions are chip pads.

39. The semiconductor package of claim 36, further comprising a plurality of external leads formed on the conductive portions of the flexible adhesive, wherein the plurality of external leads are electrically conductive media.

40. The semiconductor package of claim 36, further comprising a heat conductor that is positioned between the first and second chips.

41. A semiconductor package, comprising:

a first and a second semiconductor chip, wherein a plurality of chip pads are formed on a first side of each of the semiconductor chips;

a heat conductive plate positioned between the first and second semiconductor chips and in contact with each of the semiconductor chips; and

a flexible bonding tape comprising a plurality of conductive interconnections, wherein the flexible bonding tape is bonded to the first side of each of the semiconductor chips such that the conductive interconnections make electrical contact with corresponding ones of the plurality of chips pads of each semiconductor chip.

42. The semiconductor package of claim 41, wherein the first and a second semiconductor chip each comprise a second side, and the heat conductive plate is in contact with the second side of each of the semiconductor chips.

43. The semiconductor package of claim 41, wherein the plurality of conductive interconnections electrically connect each respective chip pad of the first semiconductor chip to a corresponding chip pad of the second semiconductor chip.

44. The semiconductor package of claim 41, wherein the heat conductive plate is in contact with the first side of each of the semiconductor chips.