Method for forming an L-shaped spacer using a disposable polysilicon spacer

• US 6,346,468 B1
• Filed: 02/11/2000
• Issued: 02/12/2002
• Est. Priority Date: 02/11/2000
• Status: Expired due to Term

• Current Assignee: Chartered Semiconductor Manufacturing Incorporated (Mamoura Diversified Global Holding PJSC)
• Original Assignee: Chartered Semiconductor Manufacturing Incorporated (Mamoura Diversified Global Holding PJSC)
• Inventors: Chhagan, Vijai Komar, Gupta, Subhash, Pradeep, Yelehanka Ramachandramurthy
• Primary Examiner(s): Nguyen, Tuan H.
• Application Number:
  US09/502,037
• Time in Patent Office: 732 Days
• Field of Search: 438/595, 438/596, 438/303, 438/304, 438/305, 438/306, 438/307
• US Class Current: 438/595
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 29/6653 using the removal of at least part of spacer, e.g. disposable spacer
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

Abstract

A method for forming an L-shaped spacer using disposable polysilicon top spacers. A semiconductor structure is provided having a gate structure thereon. A liner oxide layer is formed on the gate structure. A dielectric spacer layer is formed on the liner oxide layer. A disposable polysilicon top spacer layer is formed on the dielectric spacer layer. The disposable polysilicon top spacer layer is anisotropically etched to form disposable polysilicon top spacers. The dielectric spacer layer is etched to form L-shaped dielectric spacers, using the disposable polysilicon top spacers as an etch mask. The disposable polysilicon top spacers are removed leaving an L-shaped dielectric spacer. In one embodiment, lightly doped source and drain regions are formed prior to forming the liner oxide layer and the L-shaped spacers.

Claims

1. An in-situ method for forming an L-shaped spacer using disposable polysilicon top spacers, comprising the steps of:

a. providing a semiconductor structure having a gate structure thereon;

b. implanting impurity ions to form lightly doped source and drain regions;

c. forming a liner oxide layer on said gate structures;

d. forming a dielectric spacer layer on said liner oxide layer;

said dielectric spacer layer comprising silicon nitride;

e. forming a disposable polysilicon top spacer layer on said dielectric spacer layer;

f. anisotropically etching said disposable polysilicon top spacer layer to form disposable polysilicon top spacers;

g. in-situ, anisotropically etching said dielectric spacer layer to form L-shaped dielectric spacers, using said disposable polysilicon top spacers as an etch mask; and

h. in-situ, removing said disposable polysilicon top spacers.

2. The method of claim 1 wherein said dielectric spacer layer comprises silicon nitride having a thickness of between about 50 Angstroms and 700 Angstroms.

3. The method of claim 1 wherein said disposable polysilicon top spacer layer comprises chemical vapor deposition polysilicon having a thickness of between about 50 Angstroms and 800 Angstroms.

4. The method of claim 1 wherein said disposable polysilicon top spacer is formed by anisotropically plasma etching said disposable polysilicon top spacer layer using a chemistry consisting of CF₄, Cl₂, Hbr, O₂, He or any combination thereof;

with a top electrode power of between about 50 watts and 450 watts and a bottom electrode power of between about 50 watts and 300 watts.

5. The method of claim 1 wherein said dielectric spacer layer is anisotropically plasma etched in-situ to form L-shaped dielectric spacers using said disposable polysilicon top spacers as an etch mask;

said dielectric spacer layer being etched with a, chemistry consisting of SF₆/HBr/O₂, CH₂F₂/O₂, CH₃F/O₂, Cl₂/HBr/O₂, or a combination thereof, a top electrode power of between about 50 watts and 300 watts, and a bottom electrode power of between about 50 watts and 300 wafts.

6. The method of claim 1 wherein said disposable polysilicon top spacers are removed using an in-situ plasma etch.