Circuit for direct sequence spread spectrum digital transmissions with generation of an interference signal

• US 6,347,112 B1
• Filed: 10/05/1998
• Issued: 02/12/2002
• Est. Priority Date: 10/22/1997
• Status: Expired due to Term

• Current Assignee: Commissariat a L'Energie Atomique (French Alternative Energies and Atomic Energy Commission)
• Original Assignee: Commissariat a L'Energie Atomique (French Alternative Energies and Atomic Energy Commission)
• Inventors: Varreau, Didier, Lequepeys, Jean-René, Piaget, Bernard, Lattard, Didier
• Primary Examiner(s): Ghayour, Mohammad H.
• Application Number:
  US09/166,544
• Time in Patent Office: 1,226 Days
• Field of Search: 375/146, 375/140, 375/130, 375/135, 375/244, 370/335, 370/336, 370/342, 370/343, 370/441, 370/442
• US Class Current: 375/146
• CPC Class Codes: H04B 1/7107 Subtractive interference cancellation

Abstract

A circuit able to operate either as a direct sequence spread spectrum differential signal emitter, or as a generator of interference signals corresponding to multiple access noise. The circuit employs a clock signal formation and data processing module, a differential coding module, a multiplexing module, and a direct sequence spread module when operating as a spread spectrum emitter, and has an additional amplification-inversion module for use when generating an interference signal.

Claims

1. Circuit for direct sequence spread spectrum digital transmissions with the generation of interference signals corresponding to multiple access noise, comprising:

a) a first module able to receive on one input data and organize them into symbols and produce on an output a clock signal linked with said symbols,

b) a second module for the differential coding of the symbols supplied by the first module,

c) a third multiplexing module incorporating a first group of inputs connected to the differential coding module and a second group of inputs (E(I), E(Q)) able to receive two data items (D(I), D(Q)) defining the polarity of the interference generation signal, said multiplexing module transmitting one or other of the signals present on one or other of said input groups,

d) a fourth spreading module able to multiply the signal which it receives from the multiplexing module by a pseudorandom sequence,

e) a fifth amplification-inversion module having a signal input connected to the spreading module and having two control inputs (E(I), E(Q)) able to receive two signals (A(I), A(Q)) for regulating the amplification gain, the outputs of said fifth module supplying either two amplified and inverted signals (S_I, S_Q) when the fifth module is active, or the signal applied to its input when it is rendered transparent,

said circuit being able to operate either as a direct sequence spread spectrum differential signal emitter when the first, second and fourth modules are rendered active, the multiplexing module then transmitting data coming from the second differential coding module, the fifth module also being rendered transparent, or as a generator of interference signals corresponding to the multiple access noise when the multiplexing module transmits the data applies to its second group of inputs and when the fourth and fifth modules are rendered active, the first and second modules being rendered inactive.

2. The circuit according to claim 1, wherein said circuit is placed in a component integrating a direct sequence spread spectrum differential signal receiver and said circuit, the receiver supplying data (D_I, D_Q) applied to the third multiplexing module of said circuit, as well as signals (A_I, A_Q) for controlling the amplification gain performed by the fifth module.