CMOS image sensor with high quantum efficiency
First Claim
Patent Images
1. An imaging integrated circuit, comprising:
- a plurality of pixel cells, each pixel cell including a substrate portion configured to accumulate photon-generated electric charge, a photogate over said substrate portion, a floating diffusion sense node adjacent said photogate, an output transistor connected to said floating diffusion sense node, and wherein said photogate forms a plurality of gaps allowing light to penetrate to said substrate portion without having to pass through said photogate, said gaps extending toward said floating diffusion without being blocked by any portion of said photogate.
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Abstract
An image sensor integrated circuit with a pixel cell having photogates wherein each photogate has a number of gaps which allow light to penetrate to the substrate. The gaps are open in the direction of the floating diffusion, in order to minimize the trapping of charges. In a preferred embodiment, the floating gate has a comb structure, with the tines of the comb extending toward the floating gate. Preferably, the tines or fingers are wider than the gaps. In a preferred embodiment, the gaps are no wider than 3 microns.
12 Citations
7 Claims
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1. An imaging integrated circuit, comprising:
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a plurality of pixel cells, each pixel cell including a substrate portion configured to accumulate photon-generated electric charge, a photogate over said substrate portion, a floating diffusion sense node adjacent said photogate, an output transistor connected to said floating diffusion sense node, and wherein said photogate forms a plurality of gaps allowing light to penetrate to said substrate portion without having to pass through said photogate, said gaps extending toward said floating diffusion without being blocked by any portion of said photogate. - View Dependent Claims (2, 3, 4, 6)
a transfer gate between said photogate and said floating diffusion.
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6. The circuit of claim 1 wherein each of said gaps is no wider than three microns.
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5. The circuit of claim I wherein said photogate comprises a plurality of fingers defining said gaps, said fingers being wider than said gaps.
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7. An imaging integrated circuit, comprising:
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a plurality of pixel cells, each pixel cell including a substrate portion configured to accumulate photon-generated electric charge, a photogate over said substrate portion, a floating diffusion sense node adjacent said photogate, an output transistor connected to said floating diffusion sense node, and wherein said photogate is a comb structure with a plurality of fingers forming a plurality of gaps allowing light to penetrate to said substrate portion without having to pass through said photogate, said gaps extending toward said floating diffusion without being blocked by any portion of said photogate, said fingers being wider than said gaps.
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Specification
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Current AssigneeExar Corporation (Maxlinear Incorporated)
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Original AssigneeExar Corporation (Maxlinear Incorporated)
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InventorsJing, Tao
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Primary Examiner(s)Font, Frank G.
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Assistant Examiner(s)Smith, Zandra V.
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Application NumberUS09/301,428Time in Patent Office1,035 DaysField of Search348/307, 348/308, 348/309, 250/208.1, 250/214.1, 250/214.LS, 257/436, 257/448, 257/457, 257/459US Class Current250/208.1CPC Class CodesH01L 27/14812 Special geometry or disposi...
