Monolithically integrated trench MOSFET and Schottky diode

• US 6,351,018 B1
• Filed: 02/26/1999
• Issued: 02/26/2002
• Est. Priority Date: 02/26/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Sapp, Steven Paul
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Anya, Igwe U.
• Application Number:
  US09/267,921
• Time in Patent Office: 1,096 Days
• Field of Search: 257/499, 257/342, 257/479, 257/331, 257/471, 257/341, 257/329, 257/155, 257/146, 257/328, 438/179
• US Class Current: 257/499
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A monolithically integrated Schottky diode together with a high performance trenched gate MOSFET. A MOS enhanced Schottky diode structure is interspersed throughout the trench MOSFET cell array to enhance the performance characteristics of the MOSFET switch. The forward voltage drop is reduced by taking advantage of the low barrier height of the Schottky structure. In a specific embodiment, the width of the trench is adjusted such that depletion in the drift region of the Schottky is influenced and controlled by the adjacent MOS structure to increase the reverse voltage capability of the Schottky diode.

Claims

1. A monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, comprising:

a first trench extending into the substrate and substantially filled by conductive material forming a gate electrode of the field effect transistor;

a pair of doped source regions positioned adjacent to and on opposite sides of the trench and inside a doped body region, the doped source regions forming a source electrode of the field effect transistor, and the substrate forming a drain electrode of the field effect transistor; and

a Schottky diode having a barrier layer formed on the surface of the substrate and between a pair of adjacent trenches extending into the substrate, the pair of adjacent trenches being substantially filled by conductive material and being separated by a distance W, wherein the conductive material in each trench is separated from trench walls by a thin layer of dielectric, and

wherein the integrated structure further comprises a second trench adjacent to the first trench, the second trench forming the gate electrode of the field effect transistor in a similar fashion to the first trench, and wherein a distance between the first trench and the second trench is greater than the distance W, and wherein the barrier layer and a metal layer contacting the source regions of the field effect transistor comprise one of either titanium tungsten or titanium nitride.

2. The monolithically integrated structure of claim 1 wherein the barrier layer and the metal layer contacting the source regions connect together by an overlying layer of aluminum.

3. The monolithically integrated structure of claim 1 wherein the conductive material in the first and second trenches electrically connects to the conductive material in the pair of adjacent trenches between which the Schottky diode is formed.

4. The monolithically integrated structure of claim 1 wherein the conductive material in the pair of adjacent trenches between which the Schottky diode is formed is electrically isolated from the conductive material in the first and second trenches.

5. The monolithically integrated structure of claim 4 wherein the metal forming the barrier layer also covers and connects to the conductive material in the pair of adjacent trenches between which the Schottky diode is formed.

6. The monolithically integrated structure of claim 4 wherein the conductive material in the pair of adjacent trenches between which the Schottky diode is formed, is recessed into the pair of adjacent trenches and covered by a layer of dielectric material.

7. A monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, comprising

a plurality of trenches extending in parallel and into the substrate forming a corresponding plurality of mesas therebetween, the plurality of trenches being substantially filled by a conductive material that is separated from trench walls by a thin layer of dielectric material;

a doped well region formed inside the plurality of mesas except for at least one mesa;

a pair of doped source regions formed on the surface of the substrate in each doped well region and adjacent to trench walls; and

a layer of metal formed on the surface of the substrate on the plurality of mesas to connect to the pair of doped source regions, the layer of metal also forming a barrier layer on the surface of the at least one mesa,

wherein, the layer of metal connecting to the pair of doped source regions forms a source terminal of the field effect transistor, the substrate forms a drain terminal of the field effect transistor, and the conductive material in the plurality of trenches forms a gate terminal of the field effect transistor, and

wherein, the layer of metal forming a barrier layer on the surface of the at least one mesa comprises an anode terminal of a Schottky diode and the substrate forms a cathode terminal of the Schottky diode.

8. The monolithically integrated structure of claim 7 wherein a width of the at least one mesa is smaller than a width of the remaining plurality of mesas.

9. The monolithically integrated structure of claim 8 wherein the conductive material substantially filling the plurality of trenches comprises polysilicon, and the layer of metal comprises titanium tungsten.

10. The monolithically integrated structure of claim 8 wherein the conductive material substantially filling the plurality of trenches are electrically connected.

11. The monolithically integrated structure of claim 8 wherein the conductive material inside trenches forming the at least one mesa is electrically isolated from conductive material inside the remaining plurality of trenches.

12. The monolithically integrated structure of claim 11 wherein the conductive material inside trenches forming the at least one mesa is electrically connected to the source terminal of the field effect transistor.

13. The monolithically integrated structure of claim 12 wherein the conductive material inside trenches forming the at least one mesa is recessed into the trench and covered by a layer of dielectric material.

14. A monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, comprising

a plurality of trenches extending in parallel and into the substrate forming a corresponding plurality of mesas therebetween, the plurality of trenches being substantially filled by a conductive material that is separated walls by a thin layer of dielectric material;

a plurality of doped well regions formed inside each of the plurality of mesas;

a pair of doped source regions formed on the surface of the substrate in each doped well region and adjacent to trench walls; and

a layer of metal formed on the surface of the substrate on the plurality of mesas and contacting the pair of doped source regions, the layer of metal also forming a barrier layer on the surface of substrate between a pair of adjacent doped well regions on a mesa,

wherein, the layer of metal contacting the pair of doped source regions forms a source terminal of the field effect transistor, the substrate forms a drain terminal of the field effect transistor, and the conductive material in the plurality of trenches forms the gate terminal of the field effect transistor, and

wherein, the layer of metal forming the barrier layer on the surface of the substrate comprises an anode terminal of a Schottky diode and the substrate forms a cathode terminal of the Schottky diode.

15. The monolithically integrated structure of claim 14 wherein at each location where the barrier metal is formed, the corresponding mesa is made narrower by increasing the width of trenches on either side.

16. A method of manufacturing a trench field effect transistor and a Schottky diode on a semiconductor substrate, comprising the steps of:

forming a plurality of trenches extending into the substrate, with a first trench being adjacent to a second trench, and the second being adjacent to a third trench;

forming a layer of conductive material inside the plurality of trenches, the layer of conductive material being isolated from trench walls by a dielectric layer;

forming a doped body region extending into the substrate between the first and the second trenches and not between the second and the third trenches;

forming doped source regions inside the doped body region and adjacent to the walls of the first and the second trenches; and

forming a conductive anode layer on the surface of the substrate between the second and the third trenches, and also between the first and second trenches,

whereby a field effect transistor is formed with the substrate providing a drain terminal, the doped source regions a source terminal and the conductive layer in the first and the second trenches a gate terminal, and

a Schottky diode is formed with the substrate providing a cathode terminal and the conductive anode layer providing an anode terminal.

17. A method of manufacturing a trench field effect transistor and a Schottky diode on a semiconductor substrate, comprising the steps of:

forming a plurality of trenches extending into the substrate;

forming a layer of conductive material inside the plurality of trenches, the layer of conductive material being isolated from trench walls by a dielectric layer;

forming a plurality of doped body regions extending into the substrate between each adjacent pair of trenches;

forming doped source regions inside the doped body regions and adjacent to the walls of the adjacent pair of trenches; and

forming a conductive anode layer on the surface of the substrate between the plurality of doped body regions and contacting the doped source regions,

whereby an interspersed field effect transistor-Schottky diode structure is formed with the substrate providing a drain terminal, the doped source regions a source terminal and the conductive layer in the first and the second trenches a gate terminal of the field effect transistor, and the substrate providing a cathode terminal and the conductive anode layer providing an anode terminal of the Schottky diode.

18. The method of claim 17 further comprising:

forming an overlying metal layer on the conductive anode layer.

19. A monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, comprising:

a first trench extending into the substrate and substantially filled by conductive material forming a gate electrode of the field effect transistor;

a pair of doped source regions positioned adjacent to and on opposite sides of the trench and inside a doped body region, the doped source regions forming a source electrode of the field effect transistor, and the substrate forming a drain electrode of the field effect transistor;

a Schottky diode having a barrier layer comprising metal formed on the surface of the substrate, between a pair of adjacent trenches extending into the substrate, and wherein the barrier layer also contacts the source electrode of the field effect transistor, the pair of adjacent trenches being substantially filled by conductive material and being separated by a distance W; and

an overlying metal contacting the barrier layer.

20. The monolithically integrated structure of claim 19 wherein the barrier layer is on a mesa between the pair of adjacent trenches.

21. The monolithically integrated structure of claim 19 wherein a portion of the semiconductor substrate disposed directly under the barrier layer comprises an n-type semiconductor material.

22. The monolithically integrated structure of claim 19 wherein the barrier layer also contacts the conductive material within the pair of adjacent trenches.

23. The monolithically integrated structure of claim 19 wherein the barrier layer is substantially planar and extends over the conductive material in the pair of adjacent trenches.

24. The method of claim 23 wherein the overlying metal layer comprises aluminum and the barrier layer comprises titanium tungsten or titanium nitride.