Switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop

• US 6,351,506 B1
• Filed: 04/19/1999
• Issued: 02/26/2002
• Est. Priority Date: 04/19/1999
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Lewicki, Laurence Douglas
• Primary Examiner(s): Vo, Don N.
• Application Number:
  US09/294,289
• Time in Patent Office: 1,044 Days
• Field of Search: 375/229, 375/350, 341/118, 341/120, 341/126, 341/143, 341/155, 341/172, 327/337, 327/554, 333/173
• US Class Current: 375/350
• CPC Class Codes: H03H 19/004 Switched capacitor networks

Abstract

A switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop includes a chopper stabilized amplified filter circuit which amplifies and low pass filters its input data signal to produce an output signal with an out of band signal frequency component which is at the chop signal frequency and represents an offset and 1/f noise of the chopper stabilized amplified filter circuit. An output switched capacitor filter circuit which is synchronized with the chopper stabilized amplified filter circuit filters this signal with a stopband filter frequency response that virtually eliminates such out of band signal frequency component. When used in a closed feedback loop, this filtered signal is used to generate an offset compensation signal that corresponds to the residual offset within the output signal resulting from the amplifying and filtering of the input data signal. This offset compensation signal is then added to the input data signal prior to its amplification and filtering by the chopper stabilized amplified filter circuit.

Claims

1. An apparatus including a switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop, comprising:

a signal combining circuit configured to receive and combine an input data signal and an offset compensation signal and in accordance therewith provide a compensated data signal;

a chopper stabilized amplified filter circuit, coupled to said signal combining circuit, configured to receive one or more chop control signals and in accordance therewith receive and low pass filter said compensated data signal and in accordance therewith provide a low pass filtered signal with an out of band signal frequency component which is at a frequency of said one or more chop control signals and represents an offset and 1/f noise of said chopper stabilized amplified filter circuit;

an output filter circuit, coupled to said chopper stabilized amplified filter circuit, configured to receive and filter said low pass filtered signal and in accordance therewith provide a filtered output data signal in which said out of band signal frequency component is substantially reduced in magnitude; and

an analog-to-digital conversion (ADC) circuit, coupled to said output filter circuit, configured to receive and convert said filtered output data signal and in accordance therewith provide a digital output signal;

wherein said offset compensation signal corresponds to a residual offset within said digital output signal resulting from said providing of said low pass filtered signal and said filtered output data signal by said chopper stabilized amplified filter circuit and said output filter circuit, respectively.

2. The apparatus of claim 1, wherein said signal combining circuit comprises a signal summing circuit.

3. The apparatus of claim 1, wherein said chopper stabilized amplified filter circuit comprises a switched capacitor integrator circuit which includes a chopper stabilized amplifier circuit.

4. The apparatus of claim 1, wherein:

said chopper stabilized amplified filter circuit includes

a switched capacitor circuit configured to receive a plurality of switch control signals, and

a chopper stabilized amplifier circuit, coupled to said switched capacitor circuit, configured to receive said one or more chop control signals and provide said low pass filtered signal; and

said switched capacitor circuit and said chopper stabilized amplifier circuit are operatively coupled together and configured to receive and low pass filter said compensated data signal and in accordance therewith provide said low pass filtered signal.

5. The apparatus of claim 4, wherein said chopper stabilized amplifier circuit comprises:

an input switching circuit configured to receive said one or more chop control signals and in accordance therewith receive and convey an input signal with a first plurality of alternating signal polarities;

a telescopic amplifier circuit, coupled to said input switching circuit, configured to receive and amplify said input signal and in accordance therewith provide an output signal; and

an output switching circuit, coupled to said telescopic amplifier circuit, configured to receive said one or more chop control signals and in accordance therewith receive and convey said output signal with a second plurality of alternating signal polarities.

6. The apparatus of claim 5, further comprising a capacitive feedback circuit, coupled between said output switching circuit and said telescopic amplifier circuit, configured to receive said plurality of switch control signals and in accordance therewith capacitively couple said low pass filtered signal to a portion of said telescopic amplifier circuit.

7. The apparatus of claim 1, wherein said output filter circuit comprises a switched capacitor cosine filter circuit.

8. The apparatus of claim 7, wherein:

said switched capacitor cosine filter circuit includes

a switched capacitor circuit configured to receive a plurality of switch control signals, and

an amplifier circuit coupled to said switched capacitor circuit;

said switched capacitor circuit and said amplifier circuit are operatively coupled together and configured to receive and filter said low pass filtered signal and in accordance therewith provide said filtered output data signal; and

said plurality of switch control signals is synchronized with said one or more chop control signals.

9. The apparatus of claim 1, further comprising:

a digital modem circuit, coupled to said switched capacitor filter circuit, configured to receive and process said digital output signal and in accordance therewith provide a feedback signal; and

a feedback filter circuit, coupled to said digital modem circuit and said switched capacitor filter circuit, configured to receive and low pass filter said feedback signal and in accordance therewith provide said offset compensation signal.

10. The apparatus of claim 9, wherein said digital modem circuit comprises:

a digital signal processing circuit configured to receive and process said digital output signal and in accordance therewith provide a plurality of processed signals including an offset error signal; and

a pulse density modulator circuit, coupled to said digital signal processing circuit, configured to receive said offset error signal and in accordance therewith provide a pulse density modulated signal as said feedback signal.

11. A method which includes switching a plurality of capacitors to filter a signal with reduced offsets and providing offset compensation when filtering said signal in a closed feedback loop, comprising the steps of:

receiving and combining an input data signal and an offset compensation signal and in accordance therewith generating a compensated data signal;

receiving one or more chop control signals and in accordance therewith low pass filtering said compensated data signal and in accordance therewith generating a low pass filtered signal with an out of band signal frequency component which is at a frequency of said one or more chop control signals and represents an offset and 1/f noise;

filtering said low pass filtered signal and in accordance therewith generating a filtered output data signal in which said out of band signal frequency component is substantially reduced in magnitude; and

converting said filtered output data signal and in accordance therewith generating a digital output signal;

wherein said offset compensation signal corresponds to a residual offset within said digital output signal resulting from said generating of said low pass filtered signal and said filtered output data signal.

12. The method of claim 11, wherein said step of receiving and combining an input data signal and an offset compensation signal and in accordance therewith generating a compensated data signal comprises the step of summing said input data signal and said offset compensation signal.

13. The method of claim 11, wherein said step of receiving one or more chop control signals and in accordance therewith low pass filtering said compensated data signal and in accordance therewith generating a low pass filtered signal comprises the steps of:

switching one or more capacitors and in accordance therewith integrating said compensated data signal; and

chopper stabilizing an amplifier circuit in accordance with said one or more chop control signals during said integrating of said compensated data signal.

14. The method of claim 11, wherein said step of receiving one or more chop control signals and in accordance therewith low pass filtering said compensated data signal and in accordance therewith generating a low pass filtered signal comprises the steps of:

receiving a plurality of switch control signals and in accordance therewith switching one or more capacitors;

chopper stabilizing an amplifier circuit in accordance with said one or more chop control signals; and

integrating said compensated data signal and in accordance therewith generating said low pass filtered signal.

15. The method of claim 14, wherein said step of receiving one or more chop control signals and in accordance therewith low pass filtering said compensated data signal and in accordance therewith generating a low pass filtered signal comprises the steps of:

receiving said one or more chop control signals and in accordance therewith receiving and conveying an input signal with a first plurality of alternating signal polarities;

receiving and telescopically amplifying said input signal and in accordance therewith generating an output signal; and

receiving said one or more chop control signals and in accordance therewith receiving and conveying said output signal with a second plurality of alternating signal polarities.

16. The method of claim 15, further comprising the step of receiving said plurality of switch control signals and in accordance therewith capacitively feeding back said low pass filtered signal during said telescopically amplifying of said input signal.

17. The method of claim 11, wherein said step of filtering said low pass filtered signal and in accordance therewith generating a filtered output data signal in which said out of band signal frequency component is substantially reduced in magnitude comprises the step of cosine filtering said low pass filtered signal with one or more switched capacitors.

18. The method of claim 17, wherein said step of cosine filtering said low pass filtered signal with one or more switched capacitors comprises the steps of:

receiving a plurality of switch control signals synchronized with said one or more chop control signals and in accordance therewith switching one or more capacitors and in accordance therewith generating a switched signal; and

amplifying said switched signal and in accordance therewith provide said filtered output data signal.

19. The method of claim 11, further comprising the steps of:

processing said digital output signal with a digital modem circuit and in accordance therewith generating a feedback signal; and

low pass filtering said feedback signal and in accordance therewith generating said offset compensation signal.

20. The method of claim 19, wherein said step of processing said digital output signal with a digital modem circuit and in accordance therewith generating a feedback signal comprises the steps of:

digitally processing said digital output signal and in accordance therewith generating a plurality of processed signals including an offset error signal; and

receiving said offset error signal and in accordance therewith generating a pulse density modulated signal as said feedback signal.