I/O signaling circuit

• US 6,351,691 B1
• Filed: 10/15/1998
• Issued: 02/26/2002
• Est. Priority Date: 10/15/1998
• Status: Expired due to Term

• Current Assignee: Micro Motion Incorporated (Emerson Electric Company)
• Original Assignee: Micro Motion Incorporated (Emerson Electric Company)
• Inventors: Mansfield, William M.
• Primary Examiner(s): Grant, William
• Assistant Examiner(s): Hartman, Jr., Ronald D
• Application Number:
  US09/173,362
• Time in Patent Office: 1,230 Days
• Field of Search: 710/8, 710/10, 700/11, 700/12, 700/22, 700/282, 323/285, 340/870.18, 340/517, 340/310.01, 326/80
• US Class Current: 700/282
• CPC Class Codes: G08C 19/02 in which the signal transmitted is magnitude of current or voltage G08C19/36, G08C19/38 take precedence

Abstract

An I/O signaling circuit having a single path through the circuit which can be configured to operate in one of a plurality of modes. A first circuit in the I/O signaling circuit adjusts the current flowing from a power supply to ground. A second circuit adjusts the voltage between a high potential terminal and low potential potential terminal through a remote secondary processing device. A processor determines the proper mode in which the circuit is to operate and then generates signals to adjust the first and second circuits to configure the circuit.

Claims

1. An integrated I/O signaling circuit capable of operating in one of a plurality of modes for bi-directionally exchanging information over a single path with a remote secondary processing device, said I/O signaling circuit comprising:

a power supply having a ground and a high potential output;

a high potential terminal that receives said high potential from said power supply;

a low potential terminal;

a first variable impedance device connected between said high potential terminal and said low potential terminal;

a second variable impedance device connected between said low potential terminal and ground;

a first circuit for controlling the impedance of said first variable impedance device;

a second circuit for controlling the impedance of said second variable impedance device; and

wherein said first circuit and said second circuit and said first variable impedance device and said second variable impedance device configure said I/O signaling circuit to operate in one of said plurality of modes for exchanging signals with said remote secondary processing device over said single path.

2. The integrated I/O signaling circuit of claim 1 characterized in that

said first circuit controls the voltage between said high potential terminal and said low potential terminal; and

said second circuit controls current flow between said low potential terminal and ground.

3. The integrated I/O signaling circuit of claim 2 characterized in that said second circuit comprises:

a first resistor having one side connected to ground; and

a first transistor connected between said low potential terminal and another side of said first resistor.

4. The integrated I/O signaling circuit of claim 3 characterized in that said second circuit further comprises:

an operational amplifier that receives an analog control signal from said another side of said first resistor and generates a control voltage that is applied to an input gate of said first transistor to control the current flow said through said first transistor of said second circuit.

5. The integrated I/O signaling circuit of claim 4 characterized in that said second circuit further comprises a first monitor path connected to said another side of said first resistor.

6. The integrated I/O signaling circuit of claim 2 characterized in that said first circuit comprises:

a first transistor connected between said high potential terminal and said low potential terminal that receives a digital signal to control the impedance of said first transistor of said first circuit.

7. The integrated I/O signaling circuit of claim 6 characterized in that said first circuit further comprises a first biasing resistor connected between said high potential terminal and an input of said first transistor of said first circuit to generate a bias for said first transistor of said first circuit.

8. The integrated I/O signaling circuit of claim 7 characterized in that said first circuit further comprises:

a second biasing resistor that extends said input signal to said input of first transistor of said first circuit.

9. The integrated I/O signaling circuit of claim 6 characterized in that said first transistor of said first circuit is a source to drain transistor and said first circuit further comprises:

a fuse connected between an output of said first transistor of said first circuit and said low potential terminal.

10. The circuit of claim 1 characterized in that said power supply is connected in series with a diode to said high potential terminal to prevent a reverse current from flowing into said power supply when said power supply is in an off condition.

11. The circuit of claim 1 wherein said plurality of modes includes:

a 4-20 milliamp Output mode.

12. The circuit of claim 1 wherein said plurality of modes includes:

a 4-20 milliamp In put mode.

13. The circuit of claim 1 wherein said plurality of modes includes:

an active discrete output mode.

14. The circuit of claim 1 wherein said plurality of modes includes:

a passive discrete output mode.

15. The circuit of claim 1 wherein said plurality of modes includes:

an active frequency output mode.

16. The circuit of claim 1 wherein said plurality of modes includes:

a passive frequency output mode.

17. The circuit of claim 1 wherein said plurality of modes includes:

a digital mode.

18. The circuit of claim 1 wherein said plurality of mode s includes:

an active input discrete mode.

19. The circuit of claim 1 wherein said plurality of modes includes:

a passive discrete input mode.

20. The circuit of claim 1 wherein said plurality of modes includes:

a passive frequency input mode.

21. The circuit of claim 1 wherein said plurality of modes includes:

an active frequency input mode.

22. The circuit of claim 1 wherein said integrated I/O signaling circuit is incorporated into meter electronics of a Coriolis mass flowmeter.

25. The integrated I/O signaling circuit of claim 1 wherein said single path is a pair of wires common to all of said modes.

23. A method for configuring an integrated I/O signaling circuit to operate in one of a plurality of modes comprising the steps of:

applying a first signal to an input of said first transistor connected between a high potential terminal and a low potential terminal to control a voltage between said high potential terminal and low potential terminal;

applying a second signal to an input of a second transistor connected between a low potential terminal and a resistor having one terminal connected to ground to control the flow of current from said low potential terminal through said second transistor to ground; and

applying power to said single path in response to the application of said first and second signals to said inputs of said transistors.

24. The method of claim 23 further comprising the steps of:

determining which one of a plurality of modes is to be provided by said integrated I/O circuit;

generating said first signal and said second signal with a processor in response to said determination of said one of said plurality of modes to be provided; and

transmitting said first signal to said input of said first transistor and said second signal to an input of said second transistor.