High breakdown voltage semiconductor device having trenched film connected to electrodes

• US 6,353,252 B1
• Filed: 07/28/2000
• Issued: 03/05/2002
• Est. Priority Date: 07/29/1999
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Nakamura, Kazutoshi, Yasuhara, Norio, Kawaguchi, Yusuke
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): HO, TU TU V
• Application Number:
  US09/628,715
• Time in Patent Office: 585 Days
• Field of Search: 257/487, 257/489, 257/491, 257/492, 257/493, 257/330-334
• US Class Current: 257/487
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/405 Resistive arrangements, e.g. resistive or semi-insulating field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41 characterised by their shape, relative sizes or dispositions
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7824 with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A plurality of trenches are formed in a drift region between a p-type body region and an-type buffer region. A silicon oxide film is formed on the side and bottom of each of the trenches, and an SIPOS film is buried into each of the trenches. The trenches are formed by RIE, and the SIPOS film is deposited by LPCVD and an undesired portion can be removed by dry etching such as RIE. The SIPOS film is connected to a source electrode at the source end of each trench, and it is connected to a drain electrode directly or through a resistor at the drain end thereof. When a high voltage is applied, a depletion layer expands in the n-type drift region from an interface between the n-type drift region and the trench on each side of the n-type drift region, therefore, the impurity concentration of the n-type drift region can be heightened without lowering the high breakdown voltage, and the resistance of the drift region can be decreased.

Claims

1. A high breakdown voltage semiconductor device formed on a high resistance semiconductor layer, comprising:

a plurality of trenches formed like a stripe in a drift region in substantially parallel with a current flowing direction;

an insulation film formed on a side and a bottom of each of the trenches; and

a high resistance film buried into each of the trenches with the insulation film interposed therebetween,

wherein the high resistance film is connected to one of source and gate electrodes directly or through a resistor near a source-end portion of each of the trenches, and the high resistance film is connected to a drain electrode directly or through a resistor near a drain-end portion of each of the trenches.

6. The high breakdown voltage semiconductor device according to claim 1, wherein the high resistance film is formed on one of a semi-insulating polycrystalline silicon and polysilicon.

2. A high breakdown voltage semiconductor device formed on a high resistance semiconductor layer of a first conductivity type, comprising:

a drift region of a second conductivity type selectively formed on a surface of the high resistance semiconductor layer;

a plurality of trenches formed like a stripe in the drift region in substantially parallel with a current flowing direction;

an insulation film formed on a side and a bottom of each of the trenches; and

a high resistance film buried into each of the trenches with the insulation film interposed therebetween,

wherein the high resistance film is connected to one of source and gate electrodes directly or through a resistor near a source-end portion of each of the trenches, and the high resistance film is connected to a drain electrode directly or through a resistor near a drain-end portion thereof.

7. The high breakdown voltage semiconductor device according to claim 2, wherein the high resistance film is formed on one of a semi-insulating polycrystalline silicon and polysilicon.

3. A high breakdown voltage semiconductor device including a first high breakdown voltage MOSFET, a second high breakdown voltage MOSFET, a resistor, comprising:

a plurality of trenches formed like a stripe in a drift region of the first high breakdown voltage MOSFET, in substantially parallel with a current flowing direction;

an insulation film formed on a side and a bottom of each of the trenches; and

a high resistance film buried into each of the trenches with the insulation film interposed therebetween,

wherein the first high breakdown voltage MOSFET and the second high breakdown voltage MOSFET have a common source electrode and a common gate electrode, and one end of the high resistance film is connected to the common gate electrode, while another end thereof is connected to a drain electrode of the second high breakdown voltage MOSFET and one end of the resistor.

4. The high breakdown voltage semiconductor device according to claim 3, the first high breakdown voltage MOSFET and the second high breakdown voltage MOSFET are formed in a common semiconductor layer.

8. The high breakdown voltage semiconductor device according to claim 3, wherein the high resistance film is formed on one of a semi-insulating polycrystalline silicon and polysilicon.

9. The high breakdown voltage semiconductor device according to claim 4, wherein the high resistance film is formed on one of a semi-insulating polycrystalline silicon and polysilicon.

5. A high breakdown voltage semiconductor device formed on a high resistance semiconductor layer, comprising:

a plurality of trenches formed like a stripe in a drift region in substantially parallel with a current flowing direction;

an insulation film formed on a side of each of the trenches; and

a high resistance film buried into each of the trenches,

wherein the high resistance film is connected to one of source and gate electrodes directly or through a resistor near a source-end portion of each of the trenches, and the high resistance film is connected to a drain region near a drain-end portion of each of the trenches.

10. The high breakdown voltage semiconductor device according to claim 5, wherein the high resistance film is formed on one of a semi-insulating polycrystalline silicon and polysilicon.