Effective diffusion barrier

• US 6,353,260 B2
• Filed: 02/20/2001
• Issued: 03/05/2002
• Est. Priority Date: 01/04/1999
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Chung-Shi, Yu, Chen-Hua, Shue, Shau-Lin
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Le, Bau T
• Application Number:
  US09/785,106
• Publication Number:
  US 20010007374A1
• Time in Patent Office: 378 Days
• Field of Search: 438/637, 438/687, 438/692, 438/643, 438/626, 438/653, 357/67, 257/751, 257/752
• US Class Current: 257/758
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner

Abstract

In forming a semiconductor device in which an electrically conductive substrate is covered with a dielectric layer by the following steps, form a trench with a trench line on top and a contact hole on the bottom in the dielectric layer with the overall trench reaching down to the substrate. Preclean the trench. Form a tantalum film over the dielectric layer including the trench walls, covering the exposed the substrate surface. Fill grain boundaries of the tantalum film with at least one of tantalum oxide and tantalum nitride forming a filled tantalum film. Form a redeposited tantalum layer above the filled tantalum film. Form a copper seed film above the redeposited tantalum film. Plate the device filling the trench with a plated bulk copper layer on the seed film. Planarize the device to expose the top surface of the dielectric layer, removing surplus portions of the filled tantalum film, the copper seed film, and the bulk copper layer. The filled tantalum film is formed by exposing the tantalum to air under STP atmospheric conditions or by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400° C.

Claims

1. A semiconductor device in which an electrically conductive substrate is covered with a dielectric layer comprising:

a trench with a dual damascene structure comprising a trench line space stacked above a contact hole in said dielectric layer, said trench reaching down to expose a portion of said substrate, said trench having walls,

a tantalum metal film is formed superjacent to said dielectric layer covering said walls of said trench and covering said portion of said substrate,

grain boundaries of said tantalum metal film having been filled with at least one of tantalum oxide and tantalum nitride forming a stuffed tantalum metal film, with a film filling grain boundaries/interstices with additional tantalum oxide formed on the surface of the tantalum metal film,

a copper seed film formed above said stuffed tantalum metal film,

a bulk copper layer superjacent to said copper seed film, and

said device was planarized to expose the top surface of said dielectric layer, with surplus portions of said filled tantalum metal film, said copper seed film, and said bulk copper layer removed.

2. A device in accordance with claim 1 wherein a redeposited tantalum layer is superjacent to said filled tantalum metal film.

3. A device in accordance with claim 1 wherein:

said trench was precleaned by argon sputtering prior to forming said tantalum metal film, and

a redeposited tantalum layer is superjacent to said filled tantalum metal film.

4. A device in accordance with claim 1 wherein:

said trench was precleaned by argon sputtering prior to forming said tantalum metal film,

said filled tantalum metal film was formed by exposing said tantalum to air under STP atmospheric conditions, and

a redeposited tantalum layer is superjacent to said filled tantalum metal film.

5. A device in accordance with claim 1 wherein:

said trench was precleaned by argon sputtering prior to forming said tantalum metal film, and

a redeposited tantalum layer is superjacent to said filled tantalum metal film.

6. A semiconductor device in which an electrically conductive substrate is covered with a dielectric layer comprising:

a trench in said dielectric layer reaching down to expose a portion of said substrate, said trench having walls,

said trench was precleaned by argon sputtering prior to forming a tantalum metal film which is formed superjacent to said dielectric layer covering said walls and covering said portion of said substrate,

said tantalum metal film having grain boundaries having been filled with at least one of tantalum oxide and tantalum nitride forming a stuffed tantalum metal film filling grain boundaries/interstices with additional tantalum oxide formed on the surface of the tantalum metal film,

a redeposited tantalum metal layer superjacent to said stuffed tantalum metal film,

a copper seed film superjacent to said redeposited tantalum metal layer,

said trench filled with a plated bulk copper layer superjacent to said copper seed film, and

said device was planarized to expose the top surface of said dielectric layer, after removal of surplus portions of said filled tantalum metal film, said copper seed film, and said bulk copper layer.

7. A device in accordance with claim 6 wherein said filled tantalum metal film was exposed to air under STP atmospheric conditions.

8. A device in accordance with claim 6 wherein said filled tantalum metal film was exposed to nitrous oxide (N₂O) gas in a plasma at a temperature of about 400°

C.

9. A semiconductor device with a dielectric layer formed over an electrically conductive substrate comprising:

a trench for a dual damascene structure comprising a trench line space and a contact hole formed in said dielectric layer with the trench reaching down to expose a portion of said substrate and with the trench having walls,

the trench having been precleaned with argon sputtering prior to forming a tantalum metal film superjacent to the dielectric layer covering the walls and covering the portion of the substrate,

the tantalum metal film having been stuffed to form a stuffed tantalum metal film by filling grain boundaries of the tantalum metal film with at least one of tantalum oxide and tantalum nitride,

the stuffed tantalum metal film having been formed by exposure to a nitrous oxide (N₂O) gas in a plasma at a temperature of about 400°

C., and

a redeposited tantalum layer formed superjacent to the stuffed tantalum metal film,

a copper seed film formed above the redeposited tantalum metal film,

the device filling the trench having been plated with a bulk copper layer superjacent to the copper seed film, and

the device having been planarized to expose the top surface of the dielectric layer with surplus portions of the filled tantalum metal film, the copper seed film, and the bulk copper layer having been removed.

10. A device in accordance with claim 9 wherein the tantalum metal film has a thickness from about 20 Å

to about 500Å

.