Integrated semiconductor circuit with improved power supply control

• US 6,353,353 B1
• Filed: 12/30/1997
• Issued: 03/05/2002
• Est. Priority Date: 01/14/1997
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Nakayama, Toshiki
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): Nguyen, Hai L.
• Application Number:
  US09/000,811
• Time in Patent Office: 1,526 Days
• Field of Search: 327/111, 327/112, 327/379, 327/380, 327/381, 327/382, 327/333, 307/125, 307/141, 307/141.4, 307/141.8, 307/142, 307/137
• US Class Current: 327/382
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 19/00361 in field effect transistor circuits

Abstract

In order to prevent variations in a power-supply voltage caused by a parasitic inductance, a series circuit including at least one resistance and at least one capacitance is provided adjacent to a switching circuit, between a high-voltage-side interconnection and a low-voltage-side interconnection of the power-supply voltage for the switching circuit.

Claims

1. A semiconductor integrated circuit, comprising:

a semiconductor circuit substrate which includes;

a high-voltage-side line for supplying a high voltage;

a low-voltage-side line for supplying a low voltage;

a driver circuit connected to said high-voltage-side line and said low-voltage-side line so as to be supplied with a power voltage therefrom, for switching; and

a series circuit of a resistance and a capacitor connected between said high-voltage-side line and said low-voltage-side line; and

a package encapsulating said semiconductor circuit substrate and having a high-voltage-side input terminal and a low-voltage-side input terminal,

wherein, representing by L_p the parasitic inductance between said high-voltage-side input terminal and said high-voltage-side line or the parasitic inductance between said low-voltage-side input terminal and said low-voltage-side line and representing also by R_p the parasitic resistance between said high-voltage-side input terminal and said high-voltage-side line or the parasitic resistance between said low-voltage-side input terminal and said low-voltage-side line, a value R of said resistance and a value C of said capacitance of said series circuit are determined to meet the following conditions, for each of the high-voltage side and the low-voltage side;

2. A semiconductor integrated circuit, comprising:

a semiconductor circuit substrate which includes;

a high-voltage-side line for supplying a high voltage;

a low-voltage-side line for supplying a low voltage;

a driver circuit connected to said high-voltage-side line and said low-voltage-side line so as to be supplied with a power voltage therefrom, for effecting switching;

a series circuit of a resistance and a capacitor connected between said high-voltage-side line and said low-voltage-side line;

another high-voltage-side line independent from said high-voltage-side line, for supplying said high voltage;

another low-voltage-side line independent from said low-voltage-side line, for supplying said low voltage; and

a control circuit connected to said other high-voltage-side line and said other low-voltage-side line so as to be supplied with the power voltage therefrom, for driving said driver circuit; and

a package encapsulating said semiconductor circuit substrate and having a plurality of high-voltage-side input terminals and a plurality of low-voltage-side input terminals;

wherein, representing by Lp the parasitic inductance between one of said high-voltage-side input terminals and the high-voltage-side line connected thereto or the parasitic inductance between one of said low-voltage-side input terminals and the low-voltage-side line connected thereto and representing also by Rp the parasitic resistance between one of said high-voltage-side input terminals and the high-voltage-side line connected thereto or the parasitic resistance between one of said low-voltage-side input terminals and said low-voltage-side line connected thereto, the value R of said resistance and the value C of said capacitance of said series circuit are determined to meet the following conditions, for each of the high-voltage side and the low-voltage side;