Circuit for enabling servo system to perform an automatic system recovery and the method therefor

• US 6,356,130 B1
• Filed: 08/24/2000
• Issued: 03/12/2002
• Est. Priority Date: 08/24/2000
• Status: Active Grant

• Current Assignee: Inventec Corporation
• Original Assignee: Inventec Corporation
• Inventors: Lee, Chun-Liang
• Primary Examiner(s): Cunningham, Terry D.
• Assistant Examiner(s): Dinh, Paul
• Application Number:
  US09/644,832
• Time in Patent Office: 565 Days
• Field of Search: 327/198, 327/227, 327/387, 327/392, 327/535, 327/538, 327/540, 327/142, 327/143, 327/393
• US Class Current: 327/198
• CPC Class Codes: H03K 5/19 Monitoring patterns of pulse trains indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02

Abstract

A circuit for enabling a servo to perform an automatic system recovery and a method therefor, involves the provision of a timer and associated circuit in the servo˜such that the servo system can transmit a system normal signal to the timer at predetermined intervals. Once the servo system is abnormally terminated, resulting in an interruption of the transmission of the normal signal, the timer is triggered to generate a reset signal for restarting the servo so as to complete the reset process of the system.

Claims

1. A method for enabling a servo of a servo system to perform an automatic system recovery, comprising the steps of:

a) providing a timer circuit in the servo such that the servo system transmits a system normal signal to the timer circuit at predetermined intervals of time;

b) triggering the timer circuit when the servo system is abnormally terminated resulting in the interruption of the transmission of the normal signal so as to generate a reset signal for restarting the servo, thereby completing a reset process of the servo system; and

c) preventing the timer circuit from being triggered to generate the reset signal upon transmission of a power supply signal from the servo system to a monitor circuit electrically coupled to an output of the timer circuit.

2. The method of claim 1, wherein the power supply signal is indicative of power system stability and wherein a trigger input of the timer is further coupled to receive the power supply signal from the system such that the reset signal is prevented from being generated in the timer circuit when the system is not powered normally.

3. The method of claim 1, further comprising a register for storing a trigger signal generated by the timer circuit to provide a record of the abnormal terminal and restart for recognition by the system or for manual recognition thereafter.

4. A circuit device for enabling a servo of a servo system to perform an automatic system recovery, comprising:

a timer;

a first transistor including a base coupled to the servo system for receiving a normal signal representing system normal and transmitted from the system at predetermined intervals of time, a collector at ground, and an emitter coupled to a voltage source and a trigger pin of the timer respectively;

a diode including an anode coupled to a connection between the first transistor and the timer and a cathode coupled to a power supply signal input from the system, said power supply signal input being arranged to receive a power supply signal indicative of power supply stability; and

a second transistor including a base coupled to a connection between the second transistor and the timer, an emitter at ground, and a collector coupled to a discharge pin and a reset pin of the timer respectively;

wherein when the servo system is abnormally terminated resulting in the interruption of the transmission of the normal signal, the timer is triggered to generate a reset signal for restarting the servo, and wherein the level of the trigger pin of the timer is kept at a low level for preventing the timer from being triggered when the system is normal and the system is powered normally.

5. The circuit device of claim 4, further comprising a monitor circuit coupled to an output pin of the timer so as to trigger the timer to generate the reset signal for restarting the servo, thereby completing a reset process of the servo system.

6. The circuit device of claim 4, wherein the monitor circuit comprises:

a transistor including a base coupled to a signal monitor end of the servo system, an emitter at ground, and a collector coupled to the voltage source;

a diode including an anode coupled to the collector of the transistor and a cathode coupled to the power supply signal input from the system; and

a first NAND gate including an output end and two input ends coupled to the anode of the diode and output pin of the timer respectively;

wherein a reset signal is generated in the timer when the system is powered normally.

7. The circuit device of claim 6, wherein the monitor circuit further comprises a second NAND gate including an output end and two input ends coupled to the output pin of the first NAND gate and the anode of the diode, whereby the reset signal is generated in the output end of the second NAND gate when the normally powered system is terminated abnormally.

8. The circuit device of claim 4, further comprising a register coupled to an output pin of the timer for storing a trigger signal generated in the output pin of the timer to provide a record of the abnormal terminal and restart for recognition by the system or for manual recognition thereafter.

9. The circuit device of claim 8, wherein the register comprises a clear signal pin coupled to the system so as to receive a clear signal for clearing the register when the system is recovered from the abnormal termination.