Apparatus having graphic processor for high speed performance

• US 6,359,624 B1
• Filed: 03/23/1999
• Issued: 03/19/2002
• Est. Priority Date: 02/02/1996
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kunimatsu, Atsushi
• Primary Examiner(s): Chauhan, Ulka J.
• Application Number:
  US09/274,305
• Time in Patent Office: 1,092 Days
• Field of Search: 345/418, 345/419, 345/422, 345/433, 345/435, 345/438, 345/473-475, 345/501-506, 345/521, 345/421, 345/592, 345/539, 345/561
• US Class Current: 345/503
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G09G 2340/10 Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
• CPC Class Codes: G09G 2352/00 Parallel handling of streams of display data
• CPC Class Codes: G09G 5/026 Control of mixing and/or overlay of colours in general G09G5/022 and G09G5/024 take precedence
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

An information processing apparatus secures a wide band width in a graphics bus and draws graphics at high speed and low cost. The apparatus employs graphics processing units connected in parallel. Each of the units is formed on a chip and has a graphics processor and a graphics memory, to provide color information and select information. The outputs of the units are selected through a tournament.

Claims

1. An information processing apparatus comprising:

(a) a processor unit configured to execute a graphical program;

(b) a main memory configured to communicate with said processor unit, and to store said graphical program and graphical data for use in executing said graphical program;

(c) first, second, third and fourth graphic circuits, each graphic circuit comprising a graphic processor unit and a graphic memory,

each said graphic processor unit configured to communicate with said processor unit, and to output video data and depth coordinate Z value,

each said graphic memory configured to communicate with said corresponding graphic processor;

(d) a first Z-comparator configured to receive two depth coordinate Z values from said first and second graphic circuits, and to compare the two depth coordinate Z values from said first and second graphic circuits;

(e) a first selector configured to receive two video data from said first and second graphic circuits, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said first Z-comparator;

(f) a second Z-comparator configured to receive two depth coordinate Z values from said third and fourth graphic circuits, and to compare the two depth coordinate Z values from said third and fourth graphic circuits;

(g) a second selector configured to receive two video data from said third and fourth graphic circuits, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said second Z-comparator;

(h) a third Z-comparator configured to receive two depth coordinate Z values from said first and second Z-comparators, and to compare the two depth coordinate Z values from said first and second Z-comparators; and

(i) a third selector configured to receive two video data from said first and second selectors, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said third Z-comparator.

2. The information processing apparatus claimed in claim 1, wherein said third selector further is configured to receive a degree of transparency α

1 from said first selector and a degree of transparency α

2 from said second selector, and to execute first and second calculations;

 

D1*(1−

α

2)+D2*α

2

3. An information processing apparatus comprising:

(a) first, second, third and fourth sub-systems, each sub-system comprising;

a processor unit configured to execute a graphical program,

a main memory configured to communicate with said corresponding processor unit, and to store said graphical program and graphical data for use in executing said graphical program,

a graphic processor unit configured to communicate with said corresponding processor unit, and to output video data and depth coordinate Z value,

a graphic memory configured to communicate with said corresponding graphic processor;

(b) a first Z-comparator configured to receive two depth coordinate Z values from said first and second sub-systems, and to compare the two depth coordinate Z values from said first and second sub-systems;

(c) a first selector configured to receive two video data from said first and second sub-systems, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said first Z-comparator;

(d) a second Z-comparator configured to receive two depth coordinate Z values from said third and fourth sub-systems, and to compare the two depth coordinate Z values from said third and fourth sub-systems;

(e) a second selector configured to receive two video data from said third and fourth sub-systems, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said second Z-comparator;

(f) a third Z-comparator configured to receive two depth coordinate Z values from said first and second Z-comparators, and to compare the two depth coordinate Z values from said first and second Z-comparators; and

(g) a third selector configured to receive two video data from said first and second selectors, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said third Z-comparator.

4. An information processing apparatus comprising:

(a) first and second sub-systems, each sub-system comprising;

a processor unit configured to execute a graphical program,

a main memory configured to communicate with said corresponding processor unit, and to store said graphical program and graphical data for use in executing said graphical program,

a graphic processor unit configured to communicate with said corresponding processor unit, and to output video data and depth coordinate Z value,

a graphic memory configured to communicate with said corresponding graphic processor;

(b) a third sub-system comprising;

a processor unit configured to execute a graphical program,

a main memory configured to communicate with said corresponding processor unit, and to store said graphical program and graphical data for use in executing said graphical program,

a graphic processor unit configured to communicate with said corresponding processor unit, and to output video data, depth coordinate Z value and a degree of transparency α

,

a graphic memory configured to communicate with said corresponding graphic processor;

(c) a first Z-comparator configured to receive two depth coordinate Z values from said first and second sub-systems, and to compare the two depth coordinate Z values from said first and second sub-systems,

(d) a selector configured to receive two video data from said first and second sub-systems, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said first Z-comparator;

(e) a second Z-comparator configured to receive two depth coordinate Z values from said first Z-comparator and said third sub-system, and to compare the two depth coordinate Z values from said first Z-comparator and said third sub-system, and

(f) a selector-multiplier configured to receive video data from said selector and said third sub-system respectively, as well as the degree of transparency α

from said third sub-system, and to execute a calculation;

5. An information processing apparatus comprising a plurality of graphic sub-systems coupled in series to each other, each of said sub-systems comprising:

(a) a processor unit configured to execute a graphical program;

(b) a main memory configured to communicate with said corresponding processor unit, and to store said graphical program and graphical data for use in executing said graphical program;

(c) a graphic processor unit configured to communicate with said corresponding processor unit, and to output internal video data, an internal depth coordinate Z value and a degree of transparency α

;

(d) a graphic memory configured to communicate with said corresponding graphic processor;

(e) an input port configured to receive external video data and an external depth coordinate Z value from a previous sub-system in an upstream side;

(f) a Z-comparator configured to receive the internal depth coordinate Z value from said corresponding graphic processor unit and the external depth coordinate Z value from said corresponding input port, and to compare the internal depth coordinate Z value and the external depth coordinate Z value;

(g) a selector configured to receive the internal video data from said corresponding graphic processor unit, the external video data from said corresponding input port and the degree of transparency a from said graphic processor unit, and to select one of the video data in accordance with a result of comparison of the two depth coordinate Z values by said Z-comparator, and to execute a calculation;

6. The information processing apparatus as claimed in claim 5, wherein said graphic memory has a first frame buffer area, a first z buffer area, a second frame buffer area and a second z buffer area.

7. The information processing apparatus as claimed in claim 5, further comprising a controller configured to receive command data from an external device and to supply said command data to each of said graphic sub-systems through a common bus.

8. The information processing apparatus as claimed in claim 7, wherein said external device is a joystick configured to be used for playing a video game, and the command data is generated in response to manipulation by a video game player.

9. The information processing apparatus as claimed in claim 5, wherein each of the graphical programs includes:

a first module for determining the three dimensional moving geometrical data and being redundantly executed in each said graphic sub-system; and

a second module for obtaining a two-dimensional view to be displayed on a monitor and being differently executed in each said graphic sub-system in accordance with a process for which each said graphic sub-system is responsible.

10. The information processing apparatus as claimed in claim 9, wherein the two-dimension view to be displayed on the monitor is a bird'"'"'s eye view.

11. The information processing apparatus as claimed in claim 9, wherein one of said sub-systems is responsible for handling a background view, and all others of said sub-systems are responsible for handling motion characters.