Balanced charge pump capacitive material sensor

• US 6,362,632 B1
• Filed: 05/24/2000
• Issued: 03/26/2002
• Est. Priority Date: 05/24/2000
• Status: Active Grant

• Current Assignee: BECS Technology, Inc.
• Original Assignee: BECS Technology, Inc.
• Inventors: Livingston, Richard A.
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): Hamdan, Wasseem H.
• Application Number:
  US09/578,010
• Time in Patent Office: 671 Days
• Field of Search: 324/629, 324/661, 324/678, 324/76.65, 324/76.66, 324/76.67, 733/04.C, 340/620, 327/517
• US Class Current: 324/661
• CPC Class Codes: G01F 23/266 measuring circuits therefor

Abstract

A balanced charge pump sensor circuit (switched capacitor) for measuring the capacitance of a sensor element includes a switching circuit having a charging state during which the sensing element is connected to a relatively fixed upper reference voltage source. The switching circuit has a discharging state during which the sensing element is connected to a summing node, typically at some different voltage between the upper and lower reference voltages. As a result of this switching action, a packet of charge is transferred from the higher voltage connection to the lower voltage connection, the quantity of charge depending on the voltage difference between these two connections and the capacitance of the sensing element at the time the connections are changed. The circuit includes a current source, a differential amplifier having a non-inverting input terminal and an inverting input terminal, a voltage divider, and a charge integrating capacitor. The balanced charge pump circuit may be used as part of a proximity detection or level measurement system in which the sensor element is positioned within a storage tank to detect or measure the level of fluid or materials stored within the storage tank.

Claims

1. A balanced charge pump circuit for coupling to a capacitive sensor element through a switching circuit for measuring the capacitance of the sensor element, wherein the switching circuit has a charging state for coupling the capacitive sensor element to an upper reference voltage source to charge the sensor element to a predetermined voltage and a discharging state in which a discharge current representative of the capacitance of the sensor element is transferred through the switching circuit, the switching circuit cycling between its charging and discharging states, the balanced charge pump circuit comprising:

a summing node coupled to the sensor element to receive discharge current when the switching circuit is in its discharging state;

a current source having a first terminal coupled to the summing node and a second terminal coupled to a lower reference voltage source for generating a source current when the summing node is coupled to the sensor element to drain current from the summing node and to offset the amount of discharge current otherwise flowing through the summing node;

a differential amplifier having a non-inverting input terminal and a inverting input terminal, wherein the inverting input terminal is coupled to the summing node, the differential amplifier generating a voltage differential signal at an output terminal representative of the discharge current from, and the capacitance of, the sensor element; and

a voltage divider coupled to the non-inverting input terminal of the differential amplifier that maintains the voltage at the non-inverting input terminal equivalent to a proportion of the voltage of the upper reference voltage source;

wherein the balanced charge pump circuit discharges the sensor element when the sensor element is decoupled from the upper reference voltage source and generates the voltage differential signal representative of the capacitance of the sensor element.

2. The balanced charge pump circuit of claim 1 further comprising a charge integrating capacitor coupled between the summing node and the non-inverting input terminal of the differential amplifier to absorb AC currents flowing into the summing node.

3. The balanced charge pump circuit of claim 1 further comprising a filter network coupled between the output terminal of the differential amplifier and the inverting input terminal of the differential amplifier.

4. The balanced charge pump circuit of claim 3 wherein the filter network comprises a feedback resistor.

5. The balanced charge pump circuit of claim 3 wherein the filter network comprises a feedback capacitor designed to slow down the rate of change of the voltage at the output terminal.

6. The balanced charge pump circuit of claim 5 wherein the filter network further comprises a feedback resistor coupled in parallel with the feedback capacitor between the output and inverting terminals of the differential amplifier.

7. The balanced charge pump circuit of claim 1 further comprising:

a charge integrating capacitor coupled between the summing node and the non-inverting input terminal of the differential amplifier to absorb current flowing into the summing node; and

a filter network coupled between the output terminal of the differential amplifier and the inverting input terminal of the differential amplifier.

8. The balanced charge pump circuit of claim 1 wherein the current source comprises a current drain resistor having a value selected to drain out current accumulated at the summing node.

9. The balanced charge pump circuit of claim 1 wherein the voltage divider comprises a first and a second voltage dividing resistor, the first voltage dividing resistor coupled between the upper reference voltage source and the non-inverting input terminal of the differential amplifier and the second voltage dividing resistor coupled between the non-inverting input terminal and the lower reference voltage source.

10. The balanced charge pump circuit of claim 9 wherein the first and second voltage dividing resistors have substantially identical resistive values such that the voltage at the non-inverting terminal of the differential amplifier is substantially equal to the average of the voltage of the upper reference voltage source and the voltage of the lower reference voltage source.

11. The balanced charge pump circuit of claim 1 wherein the sensor element is positioned within a storage tank to detect or measure the level of fluid or materials stored within the storage tank and wherein the balanced charge pump circuit produces an output signal indicative of the level of fluid or materials contained within a storage tank.

12. The balanced charge pump circuit of claim 11 wherein the sensor element comprises spaced apart first and second electrodes, and wherein the sensor element is positioned within the storage tank to receive the fluid or materials between the electrodes during use, the capacitance between the electrodes varying as a function of the fluid or material level height in the storage tank.

13. The balanced charge pump circuit of claim 1 wherein the switching circuit is temporarily disconnected between its charging and discharging states.

14. A balanced charge pump circuit for coupling to a capacitive sensor element through a switching circuit for measuring the capacitance of the sensor element, wherein the switching circuit has a charging state for coupling the capacitive sensor element to an upper reference voltage source to charge the sensor element to a predetermined voltage and a discharging state in which a discharge current representative of the capacitance of the sensor element is transferred through the switching circuit, the switching circuit cycling between its charging and discharging states, the balanced charge pump circuit comprising:

a summing node coupled to the sensor element to receive discharge current when the switching circuit is in its discharging state;

a current source having a first terminal coupled to the summing node and a second terminal coupled to a lower reference voltage source for generating a source current when the summing node is coupled to the sensor element to drain current from the summing node and to offset the amount of discharge current otherwise flowing through the summing node;

a comparator having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein the inverting input terminal is coupled to the summing node, the comparator generating a voltage output signal at the output terminal when the voltage at its inverting input terminal is substantially equal to the voltage at its non-inverting terminal;

a charge integrating capacitor coupled between the summing node and the non-inverting input terminal of the comparator to absorb AC currents flowing into the summing node; and

a voltage divider coupled to the non-inverting input terminal of the comparator that maintains the voltage at the non-inverting input terminal equivalent to a proportion of the voltage of the upper reference voltage source.

15. The balanced charge pump circuit of claim 14 wherein the current source comprises a current drain resistor having a value selected to drain out current accumulated at the summing node.

16. The balanced charge pump circuit of claim 14 wherein the voltage divider comprises a first and a second voltage dividing resistor, the first voltage dividing resistor coupled between the upper reference voltage source and the non-inverting input terminal of the differential amplifier and the second voltage dividing resistor coupled between the non-inverting input terminal and the lower reference voltage source.

17. The balanced charge pump circuit of claim 16 wherein the first and second voltage dividing resistors have substantially identical resistive values such that the voltage at the non-inverting terminal of the differential amplifier is substantially equal to the average of the voltage of the upper reference voltage source and the voltage of the lower reference voltage source.

18. The balanced charge pump circuit of claim 14 wherein the switching circuit is temporarily disconnected between its charging and discharging states.

19. A level sensor for developing an output signal indicative of the level of fluid or materials contained within a storage tank, comprising:

a sensor element having spaced apart first and second electrodes, the sensor element positioned within the storage tank to receive the fluid or materials between the electrodes during use, the capacitance between the electrodes varying as a function of the fluid or material level height in the storage tank;

an upper reference voltage source and a lower reference voltage source;

a switching circuit having a charging state for coupling the sensor element to the upper reference voltage source to charge the electrodes to a predetermined voltage and a discharging state in which a discharge current representative of the capacitance of the sensor element is transferred through the switching circuit, the switching circuit cycling between its charging and discharging states; and

a current to voltage measurement circuit coupled to the switching circuit for discharging the electrodes when the sensor element is decoupled from the upper reference voltage source and for generating a voltage differential signal representative of the capacitance of the sensor element and the level of the fluid or materials contained within the storage tank, the voltage measurement circuit comprising;

a summing node coupled to the sensor element when the switching circuit is in its discharging state;

a current source having an input coupled to the summing node and an output coupled to the lower reference voltage source for generating a source current when the summing node is coupled to the sensor element to drain current from the summing node and to offset the amount of discharge current otherwise flowing through the summing node;

a differential amplifier having a non-inverting input terminal and a inverting input terminal, wherein the inverting input terminal is coupled to the summing node, the differential amplifier generating the voltage differential signal at an output terminal representative of the discharge current from, and the capacitance of, the sensor element;

a charge integrating capacitor coupled between the summing node and the non-inverting input terminal of the differential amplifier to absorb AC currents flowing into the summing node;

a voltage divider coupled to the non-inverting input terminal of the differential amplifier that maintains the voltage at the non-inverting input terminal equivalent to a proportion of the voltage of the upper reference voltage source; and

a filter network coupled between the output terminal of the differential amplifier and the inverting input terminal of the differential amplifier.

20. The level sensor of claim 19 wherein the current source comprises a current drain resistor having a value selected to drain out the current accumulated at the summing node.

21. The level sensor of claim 19 wherein the voltage divider comprises a first and a second voltage dividing resistor, the first voltage dividing resistor coupled between the upper reference voltage source and the non-inverting input terminal of the differential amplifier and the second voltage dividing resistor coupled between the non-inverting input terminal and the lower reference voltage source.

22. The level sensor of claim 21 wherein the first and second voltage dividing resistors have substantially identical resistive values such that the voltage at the non-inverting terminal of the differential amplifier is substantially equal to the average of the voltage of the upper reference voltage source and the voltage of the lower reference voltage source.

23. The level sensor of claim 19 wherein the filter network comprises a feedback capacitor designed to slow down the rate of change of the voltage at the output terminal.

24. The level sensor of claim 23 wherein the filter network further comprises a feedback resistor coupled in parallel with the feedback capacitor between the output and inverting terminals of the differential amplifier.

25. The level sensor of claim 19 wherein the switching circuit is temporarily disconnected between its charging and discharging states.

26. A proximity detector comprising:

a sensor element;

an upper reference voltage source and a lower reference voltage source;

a switching circuit having a charging state for coupling the sensor element to the upper reference voltage source to charge the sensor element to a predetermined voltage and a discharging state in which a discharge current representative of the capacitance of the sensor element is transferred through the switching circuit, the switching circuit cycling between its charging and discharging states; and

a current to voltage measurement circuit coupled to the switching circuit for discharging the electrodes when the sensor element is decoupled from the upper reference voltage source and for generating a detection signal representative of the capacitance of the sensor element, the voltage measurement circuit comprising;

a summing node coupled to the sensor element to receive discharge current when the switching circuit is in its discharging state;

a current source having a first terminal coupled to the summing node and a second terminal coupled to a lower reference voltage source for generating a source current when the summing node is coupled to the sensor element to drain current from the summing node and to offset the amount of discharge current otherwise flowing through the summing node;

a comparator having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein the inverting input terminal is coupled to the summing node, the comparator generating a voltage output signal at the output terminal when the voltage at its inverting input terminal is substantially equal to the voltage at its non-inverting terminal;

a charge integrating capacitor coupled between the summing node and the non-inverting input terminal of the comparator to absorb current flowing into the summing node; and

a voltage divider coupled to the non-inverting input terminal of the comparator that maintains the voltage at the non-inverting input terminal equivalent to a proportion of the voltage of the upper reference voltage source.

27. The balanced charge pump circuit of claim 26 wherein the current source comprises a current drain resistor having a value selected to drain out current accumulated at the summing node.

28. The balanced charge pump circuit of claim 26 wherein the voltage divider comprises a first and a second voltage dividing resistor, the first voltage dividing resistor coupled between the upper reference voltage source and the non-inverting input terminal of the differential amplifier and the second voltage dividing resistor coupled between the non-inverting input terminal and the lower reference voltage source.

29. The balanced charge pump circuit of claim 28 wherein the first and second voltage dividing resistors have substantially identical resistive values such that the voltage at the non-inverting terminal of the differential amplifier is substantially equal to the average of the voltage of the upper reference voltage source and the voltage of the lower reference voltage source.

30. The balanced charge pump circuit of claim 26 wherein the switching circuit is temporarily disconnected between its charging and discharging states.