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Write circuit for large MRAM arrays

  • US 6,363,000 B2
  • Filed: 04/05/2001
  • Issued: 03/26/2002
  • Est. Priority Date: 05/03/2000
  • Status: Expired due to Term
First Claim
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1. A method of writing data to an array of memory cells, selected memory cells being crossed by a selected first line and different selected second lines, additional memory cells in the array being crossed by unselected lines, the method comprising the steps of:

  • supplying a first write current to the selected first line;

    supplying a second write current to the selected second line; and

    connecting both ends of the unselected lines to a high impedance.

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