Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs

• US 6,363,295 B1
• Filed: 04/15/1999
• Issued: 03/26/2002
• Est. Priority Date: 06/06/1997
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren M., Hembree, David R., Wark, James M., Wood, Alan G., Akram, Salman, Hess, Michael E., Jacobson, John O., Gochnour, Derek J.
• Primary Examiner(s): Grant, William
• Assistant Examiner(s): Garland, Steven R.
• Application Number:
  US09/292,655
• Time in Patent Office: 1,076 Days
• Field of Search: 700/121, 700/116, 700/117, 700/115, 700/105, 700/108, 700/109, 700/110, 700/112, 702/117, 702/118, 209/573, 365/200, 438/15, 438/10
• US Class Current: 700/121
• CPC Class Codes: G06F 11/006 Identification G06F11/2289 takes precedence
• CPC Class Codes: H01L 2223/5444 for electrical read out

Abstract

An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC'"'"'s at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC'"'"'s. The ID codes of the IC'"'"'s are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC'"'"'s is then accessed, and additional repair procedures the IC'"'"'s may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

Claims

1. An integrated circuit (IC) manufacturing process using data regarding manufacturing procedures a plurality of IC'"'"'s have undergone to select manufacturing procedures the IC'"'"'s will undergo, the IC'"'"'s being of the type to have a substantially unique identification (ID) code, the process comprising:

providing IC'"'"'s comprising Dynamic Random Access Memory (DRAM) IC'"'"'s;

storing data in association with the ID code of each of the IC'"'"'s that identifies manufacturing procedures the IC'"'"'s have undergone, said storing data including storing data for identifying repairs performed on the IC'"'"'s and storing data that identifies spare rows and columns available to effect repairs in the DRAM IC'"'"'s;

automatically reading the ID code of each of the IC'"'"'s;

accessing the data stored in association with the ID code of each of the IC'"'"'s; and

selecting manufacturing procedures the IC'"'"'s undergo in accordance with the accessed data; and

assembling the IC'"'"'s into packaged IC devices after the step of storing data and before the step of automatically reading the ID code of each of the IC'"'"'s.

2. The process of claim 1, wherein the IC'"'"'s comprise Dynamic Random Access Memory (DRAM) IC'"'"'s and wherein the storing data comprises storing data that identifies spare rows and columns used in repairing the DRAM IC'"'"'s.

3. The process of claim 1, wherein the step of storing data comprises storing data at probe.

4. The process of claim 1, wherein the step of automatically reading the ID code of each of the IC'"'"'s comprises electrically retrieving a unique fuse ID programmed into each of the IC'"'"'s.

5. The process of claim 1, wherein the step of automatically reading the ID code of each of the IC'"'"'s comprises optically reading a unique ID code provided on each of the IC'"'"'s.

6. The process of claim 5, wherein the step of optically reading a unique ID code provided on each of the IC'"'"'s comprises optically reading a unique laser fuse ID programmed into each of the IC'"'"'s.

7. The process of claim 1, wherein the step of automatically reading the ID code of each of the IC'"'"'s comprises automatically reading the ID code of each of the IC'"'"'s at one of an opens/shorts test, a burn-in test, and a back-end test in the IC manufacturing process.

8. The process of claim 1, wherein the step of accessing the data stored in association with the ID code of each of the IC'"'"'s comprises accessing the data stored in association with the ID code of each of the IC'"'"'s at one of an opens/shorts test, a burn-in test, and a back-end test in the IC manufacturing process.

9. The process of claim 1, wherein the step of selecting manufacturing procedures the IC'"'"'s will undergo in accordance with the accessed data comprises selecting repairs the IC'"'"'s will undergo in accordance with the accessed data.

10. The process of claim 9, wherein the IC'"'"'s comprise Dynamic Random Access Memory (DRAM) IC'"'"'s, wherein the step of selecting repairs the IC'"'"'s will undergo comprises selecting spare rows and columns that will be used to repair the DRAM IC'"'"'s.

11. The process of claim 1, wherein selecting manufacturing procedures the IC'"'"'s will undergo in accordance with the accessed data comprises selecting whether the IC'"'"'s will undergo repair procedures.

12. The process of claim 11, wherein the IC'"'"'s comprise Dynamic Random Access Memory (DRAM) IC'"'"'s, wherein the step of selecting whether the IC'"'"'s will undergo repair procedures comprises selecting whether the DRAM IC'"'"'s will be repaired in accordance with whether the accessed data indicates enough spare rows and columns are available in the IC'"'"'s to effect repairs.

13. The process of claim 1, wherein the step of selecting manufacturing procedures the IC'"'"'s will undergo in accordance with the accessed data comprises determining whether the IC'"'"'s will be assembled into Multi-Chip Modules (MCM'"'"'s) in accordance with whether the accessed data indicates the IC'"'"'s are repairable.

14. The process of claim 1, further comprising assembling the IC'"'"'s into packaged IC devices after the step of storing data and before the step of automatically reading the ID code of each of the IC'"'"'s.

15. A method of manufacturing integrated circuit (IC) devices from semiconductor wafers, the method comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of IC'"'"'s on each of the wafers;

causing each of the IC'"'"'s on each of the wafers to store a substantially unique identification (ID) code;

storing data in association with the ID code of each of the IC'"'"'s that identifies manufacturing procedures the IC'"'"'s have undergone;

separating each of the IC'"'"'s on each of the wafers from its wafer to form one of a plurality of IC dice;

assembling each of the IC dice into an IC device, said assembling including;

picking each of the IC dice from its wafer;

placing each of the IC dice onto an epoxy coated bonding site of one of a plurality of lead frames;

curing the epoxy on the bonding site of each of the lead frames;

wire bonding each of the IC dice to its associated lead frame;

encapsulating each of the IC dice and its associated lead frame to form one of a plurality of IC packages each having projecting leads;

curing each of the IC packages;

de-flashing the projecting leads of each of the IC packages;

electroplating the projecting leads of each of the IC packages; and

singulating each of the IC packages into one of a plurality of discrete IC devices;

automatically reading the ID code associated with each of the IC devices; and

accessing the data stored in association with the ID code associated with each of the IC devices.

16. The method of claim 15, further comprising:

selecting manufacturing procedures the IC'"'"'s will undergo in accordance with the accessed data.

17. The method of claim 15, wherein the step of fabricating a plurality of IC'"'"'s on each of the wafers comprises fabricating IC'"'"'s selected from a group comprising Dynamic Random Access Memory (DRAM) IC'"'"'s, Static Random Access Memory (SRAM) IC'"'"'s, Synchronous DRAM (SDRAM) IC'"'"'s, and processor IC'"'"'s.

18. The method of claim 15, wherein the step of causing each of the IC'"'"'s on each of the wafers to store a substantially unique ID code comprises programming each of the IC'"'"'s on each of the wafers to permanently store a unique fuse ID.

19. The method of claim 15, wherein the step of programming each of the IC'"'"'s on each of the wafers to permanently store a unique fuse ID comprises programming at least one of fuses and anti-fuses in each of the IC'"'"'s on each of the wafers to permanently store a unique fuse ID.

20. The method of claim 15, wherein the step of assembling each of the IC dice into an IC device comprises assembling each of the IC dice into an IC device selected from a group comprising a wire bond/lead frame IC device, a Chip-On-Board (COB) IC device, and a flip-chip IC device.

21. A method of manufacturing Multi-Chip Modules (MCM'"'"'s) from semiconductor wafers, the method comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of semiconductor devices on each of the wafers, each semiconductor device comprising a Dynamic Random Access Memory;

causing each of the semiconductor devices on each of the wafers to store a substantially unique identification (ID) code;

storing data in association with the ID code of each of the semiconductor devices that identifies manufacturing procedures the semiconductor devices have undergone, said storing data including storing data for identifying repairs performed on the semiconductor device and storing data that identifies spare rows and columns available to effect repairs in the semiconductor device;

separating each of the semiconductor devices on each of the wafers from its wafer to form one of a plurality of semiconductor devices;

assembling one or more of the semiconductor devices into each of a plurality of MCM'"'"'s;

automatically reading the ID code of each of the semiconductor devices in each of the MCM'"'"'s; and

accessing the data stored in association with the ID code of each of the semiconductor devices in each of the MCM'"'"'s.

22. The method of claim 21, further comprising:

selecting manufacturing procedures the semiconductor devices will undergo in accordance with the accessed data.

23. The method of claim 21, wherein the MCM'"'"'s are selected from a group comprising Single In-Line Memory Modules (SIMM'"'"'s) and Dual In-line Memory Modules (DIMM'"'"'s).

24. A method of manufacturing semiconductor devices from semiconductor wafers, the method comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of semiconductor devices on each of the wafers;

electronically probing each of the semiconductor devices on each of the wafers to identify good, bad and repairable semiconductor devices on each of the wafers;

repairing the repairable semiconductor devices;

programming each of the semiconductor devices on each of the wafers to store a unique fuse identification;

storing data in association with the fuse identification of each of the semiconductor devices identifying repairs performed on each of the semiconductor devices;

mounting each of the wafers on an adhesive film;

sawing each of the semiconductor devices on each of the wafers from its wafer to form one of a plurality of discrete devices;

automatically picking each of the semiconductor devices from its wafer;

placing each of the semiconductor devices onto an epoxy coated bonding site of one of a plurality of lead frames;

curing the epoxy on the bonding site of each of the lead frames;

wire bonding each of the semiconductor devices to its associated lead frame;

encapsulating each of the semiconductor devices and its associated lead frame to form one of a plurality of semiconductor device packages each having projecting leads;

curing each of the semiconductor device packages;

de-flashing the projecting leads of each of the semiconductor device packages;

electroplating the projecting leads of each of the semiconductor device packages;

singulating each of the semiconductor device packages into one of a plurality of discrete semiconductor devices;

testing each of the semiconductor devices for opens and shorts;

burn-in testing each of the semiconductor devices;

back-end testing each of the semiconductor devices;

automatically reading the identification code of each of the semiconductor devices;

accessing the data stored in association with the identification code of each of the semiconductor devices;

for any semiconductor devices failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the accessed data to determine whether the failing semiconductor devices may be repaired;

repairing any of the semiconductor devices determined in accordance with the accessed data to be repairable and returning the repaired semiconductor devices to the semiconductor manufacturing process; and

discarding any of the semiconductor devices determined in accordance with the accessed data to be unrepairable.

25. The method of claim 24, wherein the step of mounting the wafers comprises mounting each of the wafers on an ultraviolet (U.V.) adhesive film, wherein the method further comprises exposing the U.V. adhesive film to U.V. light to loosen the wafers from the film prior to picking and placing the IC dice.

26. The method of claim 24, further comprising receiving a plurality of unrepairable IC dice diverted from another IC manufacturing process for assembly into IC devices.

27. A method of manufacturing Multi-Chip Modules (MCM'"'"'s) from semiconductor wafers using Chip-On-Board (COB) techniques, the method comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of semiconductor devices on each of the wafers;

electronically probing each of the semiconductor devices on each of the wafers to identify good, bad and repairable semiconductor devices on each of the wafers;

repairing the repairable semiconductor devices;

programming each of the semiconductor devices on each of the wafers to store a unique fuse identification (ID);

storing an electronic wafer map for each wafer that identifies the locations of good and bad semiconductor devices on the wafer and associates each IC on the wafer with its fuse ID;

storing data in association with the fuse ID of each of the semiconductor devices identifying repairs performed on each of the semiconductor devices;

mounting each of the wafers on an adhesive film;

sawing each of the semiconductor devices on each of the wafers from its wafer to form one of a plurality of discrete semiconductor dice;

accessing the stored wafer map for each wafer;

accessing the stored data for each of the semiconductor devices on each of the wafers;

automatically picking each of the good semiconductor devices from its wafer;

discarding non-picked semiconductor devices identified as bad by the accessed wafer maps;

diverting picked semiconductor devices identified as good but unrepairable by the accessed wafer maps and data to a non-MCM semiconductor manufacturing process;

placing picked semiconductor devices identified as good and repairable by the accessed wafer maps and data onto epoxy coated bonding sites of each of a plurality of printed circuit boards using COB techniques to form a plurality of MCM'"'"'s;

curing the epoxy on the bonding sites of each of the MCM'"'"'s;

wire bonding each of the semiconductor devices to its associated MCM;

testing each of the semiconductor devices on each of the MCM'"'"'s for opens and shorts;

encapsulating each of the semiconductor devices on each of the MCM'"'"'s;

retesting each of the semiconductor devices on each of the MCM'"'"'s for opens and shorts;

burn-in testing each of the semiconductor devices on each of the MCM'"'"'s;

back-end testing each of the semiconductor devices on each of the MCM'"'"'s;

automatically reading the ID code of each of the IC dice in each of the MCM'"'"'s;

accessing the data stored in association with the ID code of each of the semiconductor devices;

for any semiconductor devices failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the accessed data to determine whether the failing IC dice may be repaired;

repairing any of the semiconductor devices determined in accordance with the accessed data to be repairable and returning the repaired MCM'"'"'s to the manufacturing process; and

replacing any of the semiconductor devices determined in accordance with the accessed data to be unrepairable with Known Good Die (KGD) dice and returning the repaired MCM'"'"'s to the manufacturing process.

28. The method of claim 27, further comprising plasma cleaning each of the MCM'"'"'s after curing the epoxy on the bonding sites of the MCM'"'"'s.

29. The method of claim 27, wherein the step of mounting the wafers comprises mounting each of the wafers on an Ultraviolet (U.V.) adhesive film, wherein the method further comprises exposing the U.V. adhesive film to U.V. light to loosen the wafers from the film prior to picking and placing the IC dice.

30. The method of claim 27, further comprising singulating the printed circuit boards associated with each of the MCM'"'"'s to form discrete MCM'"'"'s.

31. A method of manufacturing Multi-Chip Modules (MCM'"'"'s) from semiconductor wafers using flip-chip techniques, the method comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of devices on each of the wafers;

electronically probing each of the devices on each of the wafers to identify good, bad and repairable devices on each of the wafers;

repairing the repairable devices;

programming each of the devices on each of the wafers to store a unique fuse identification (ID);

storing an electronic wafer map for each wafer that identifies the locations of good and bad devices on the wafer and associates each device on the wafer with its fuse ID;

storing data in association with the fuse ID of each of the devices identifying repairs performed on each of the devices;

mounting each of the wafers on an adhesive film;

sawing each of the devices on each of the wafers from its wafer to form one of a plurality of discrete devices;

accessing the stored wafer map for each wafer;

accessing the stored data for each of the devices on each of the wafers;

automatically picking each of the good devices from its wafer;

discarding non-picked devices identified as bad by the accessed wafer maps;

diverting picked devices identified as good but unrepairable by the accessed wafer maps and data to a non-MCM device manufacturing process;

flip-chip attaching picked devices identified as good and repairable by the accessed wafer maps and data to bonding sites of each of a plurality of printed circuit boards to form a plurality of MCM'"'"'s;

curing each of the MCM'"'"'s;

testing each of the devices on each of the MCM'"'"'s for opens and shorts;

encapsulating each of the devices on each of the MCM'"'"'s;

retesting each of the devices on each of the MCM'"'"'s for opens and shorts;

burn-in testing each of the devices on each of the MCM'"'"'s;

back-end testing each of the devices on each of the MCM'"'"'s;

automatically reading the ID code of each of the devices in each of the MCM'"'"'s;

accessing the data stored in association with the ID code of each of the devices;

for any devices failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the

accessed data to determine whether the failing devices may be repaired;

repairing any of the devices determined in accordance with the accessed data to be repairable and returning the repaired MCM'"'"'s to the manufacturing process; and

replacing any of the devices determined in accordance with the accessed data to be unrepairable with Known Good Die (KGD) dice and returning the repaired MCM'"'"'s to the manufacturing process.

32. The method of claim 31, wherein the step of mounting the wafers comprises mounting each of the wafers on an Ultraviolet (U.V.) adhesive film, wherein the method further comprises exposing the U.V. adhesive film to U.V. light to loosen the wafers from the film prior to picking and flip-chip attaching the IC dice.

33. The method of claim 31, further comprising singulating the printed circuit boards associated with each of the MCM'"'"'s to form discrete MCM'"'"'s.

34. A method in an integrated circuit (IC) Multi-Chip Module (MCM) manufacturing process for diverting good but unrepairable semiconductor devices from the process, the semiconductor devices being of the type to have a substantially unique identification (ID) code, the method comprising:

storing data in association with the ID code of each of the semiconductor devices that identifies semiconductor devices that are good and repairable, that are good but unrepairable, and that are bad;

automatically reading the ID code of each of the semiconductor devices;

accessing the data stored in association with the ID code of each of the semiconductor devices;

diverting semiconductor devices identified as good but unrepairable by the accessed data to other semiconductor device manufacturing processes; and

discarding semiconductor devices identified as bad by the accessed data.

35. The method of claim 34, further comprising:

assembling semiconductor devices identified as good and repairable into MCM'"'"'s.