Method for contacting a circuit chip

• US 6,365,440 B1
• Filed: 07/16/2001
• Issued: 04/02/2002
• Est. Priority Date: 09/03/1998
• Status: Expired due to Term

• Current Assignee: Fraunhofer-Gesellschaft ZUR Forderung Der Angewandten Forschung EV
• Original Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Inventors: Feil, Michael
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): ZARNEKE, DAVID A
• Application Number:
  US09/786,132
• Time in Patent Office: 260 Days
• Field of Search: 438/106, 438/118, 438/121, 438/125
• US Class Current: 438/125
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07752 using an interposer
• CPC Class Codes: H01L 2224/24051 Conformal with the semiconductor or solid-state device
• CPC Class Codes: H01L 2224/24225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/24998 Reinforcing structures, e.g. ramp-like support
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/82007 involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
• CPC Class Codes: H01L 23/3185 the coating covering also the sidewalls of the semiconductor body
• CPC Class Codes: H01L 23/485 consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts H01L23/4821, H01L23/4822, H01L23/4824, H01L23/4825 take precedence; materials H01L23/532, bond pads H01L24/02, bump connectors H01L24/10
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/0102 Calcium [Ca]
• CPC Class Codes: H01L 2924/01032 Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01058 Cerium [Ce]
• CPC Class Codes: H01L 2924/01061 : Promethium [Pm]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H05K 1/095 : for polymer thick films, i.e. having a permanent organic polymeric binder
• CPC Class Codes: H05K 3/32 : electrically connecting electric components or wires to printed circuits

Abstract

In a method for contacting a circuit chip containing an integrated circuit of a thickness less than 50 μm, which has at least two pads on a first main surface, the circuit chip is first of all placed onto a main surface of a support substrate with a second main surface which faces this first main surface, in such a way that the entire thickness of the circuit chip protrudes from the surface of the support substrate. A structured metallic coating is then applied to the first main surface of the circuit chip and the surface of the support substrate by means of screen printing or stamping, in order to connect the pads of the circuit chip to a conductor structure located on the main surface of the support substrate. Alternatively, the screen printing or stamping process is used to apply a structured metallic coating to the first main surface of the circuit chip and the surface of the support substrate, in order to produce a peripheral conductor structure, which is connected to the pads of the circuit chip, on the main surface of the support substrate and on the first main surface of the circuit chip.

Claims

1. Method for contacting a circuit chip containing an integrated circuit of a thickness less than 50 μ

m, which has at least two pads on its upper side, comprising the steps of;

placing the circuit chip with its underside onto a surface of a support substrate, in such a way that the entire thickness of the circuit chip protrudes from the surface of the support substrate; and

applying a structured metallic coating to the upper face of the circuit chip and to the surface of the support substrate by means of screen printing or stamping in order to connect the pads of the circuit chip to a conductor structure located on the upper surface of the support substrate.

2. Method for contacting a circuit chip in accordance with claim 1, wherein the circuit chip is placed onto the surface of the support substrate by means of an auxiliary support.

3. Method for contacting a circuit chip in accordance with claim 1, wherein the circuit chip is adhered to the surface of the support substrate.

4. Method in accordance with claim 3, wherein a layer of bonding agent is provided on the support substrate, in which the circuit chip is pressed in such a way that the edges of the circuit chip are insulated by the layer of bonding agent.

5. Method for contacting a circuit chip containing an integrated circuit of a thickness less than 50 μ

m, which has at least two pads on its upper side, comprising the steps of;

placing the circuit chip with its underside onto a surface of a support substrate, in such a way that the entire thickness of the circuit chip protrudes from the surface of the support substrate; and

applying a structured metallic coating to the upper face of the surface chip and to the surface of the support substrate by means of screen printing or stamping in order to produce a peripheral conductor structure, which is connected to the pads of the circuit chip, on the surface of the support substrate and the upper side of the circuit chip.

6. Method for contacting a circuit chip in accordance with claim 5, wherein the circuit chip is placed onto the surface of the support substrate by means of an auxiliary support.

7. Method for contacting a circuit chip in accordance with claim 5, wherein the circuit chip is adhered to the surface of the support substrate.

8. Method in accordance with claim 7, wherein a layer of bonding agent is provided on the support substrate, in which the circuit chip is pressed in such a way that the edges of the circuit chip are insulated by the layer of bonding agent.