Self-aligned common carrier
First Claim
1. A self-aligned common carrier, comprising:
- a carrier substrate including a pocket formed in a mounting surface thereof and extending at least partially towards a backside surface of the carrier substrate, the pocket includes a first side profile formed on at least a portion thereof; and
a chip including a second side profile formed on at least a portion of a base surface of the chip, the second side profile is identical to the first side profile so that the first and second side profiles complement each other, and the chip is mounted to the carrier substrate by inserting the base surface of the chip into the pocket so that the second side profile is mated to the first side profile, wherein the chip is positioned in near perfect self-alignment with at least two orthogonal planes of the carrier substrate.
2 Assignments
0 Petitions
Accused Products
Abstract
Precision alignment of one or more parts on a common carrier is described. A self-aligned common carrier includes a carrier substrate having one or more pockets formed in the substrate. Each pocket includes a side profile formed in the pocket. A chip having an identical side profile that complements the side profile in the pocket is mounted to the carrier substrate by inserting the chip into the pocket. The complementary side profiles result in near perfect self-alignment between the chip and at least two orthogonal planes of the carrier substrate. The chip and the carrier substrate can be made from a single crystal semiconductor material and the side profiles can be formed by anisotropic etch process that selectively etches the chip and the substrate along a predetermined crystalline plane. The chip and the carrier substrate can be single crystal silicon having a (100) crystalline orientation and the side profiles can be formed by selectively etching the silicon along a (111) crystalline plane. The matching coefficients of thermal expansion between the chip and the carrier substrate substantially reduces thermal stress related interconnect failures and misalignment between the chip and the carrier substrate. The carrier substrate and the chip can be anodically bonded to each other by oxidizing either one of the carrier substrate and the chip and etching the side profiles so that they are atomically flat.
-
Citations
13 Claims
-
1. A self-aligned common carrier, comprising:
-
a carrier substrate including a pocket formed in a mounting surface thereof and extending at least partially towards a backside surface of the carrier substrate, the pocket includes a first side profile formed on at least a portion thereof; and
a chip including a second side profile formed on at least a portion of a base surface of the chip, the second side profile is identical to the first side profile so that the first and second side profiles complement each other, and the chip is mounted to the carrier substrate by inserting the base surface of the chip into the pocket so that the second side profile is mated to the first side profile, wherein the chip is positioned in near perfect self-alignment with at least two orthogonal planes of the carrier substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
at least two electrically conductive nodes, the electrically conductive nodes are disposed on either one of the chip and the carrier substrate; and
an interconnect adapted to electrically connect the electrically conductive nodes.
-
-
11. The self-aligned common carrier of claim 1, wherein either one of the first and second side profiles includes a low viscosity adhesive disposed thereon, the low viscosity adhesive is adapted to lubricate the first and second side profiles and to effectuate mating between the first and second side profiles by reducing friction therebetween.
-
12. The self-aligned common carrier of claim 1 and further comprising an adhesive adapted to fill a peripheral gap between the pocket and the chip when the chip is mounted to the carrier substrate, whereby the chip is fixedly retained in the pocket and the peripheral gap is sealed by the adhesive.
-
13. The self-aligned common carrier of claim 1, wherein the chip is a component selected from a group consisting of an inkjet printhead, a thermal inkjet printhead, a semiconductor, an IC, an ASIC, a MicroElectroMechanical System, and a fluidic device.
Specification