Method for programming multi-level non-volatile memories by controlling the gate voltage

• US 6,366,496 B1
• Filed: 08/02/2000
• Issued: 04/02/2002
• Est. Priority Date: 08/03/1999
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Torelli, Guido, Modelli, Alberto, Manstretta, Alessandro
• Primary Examiner(s): ZARABIAN, AMIR
• Application Number:
  US09/631,187
• Time in Patent Office: 608 Days
• Field of Search: 365/185.19, 365/185.22, 365/185.18, 365/185.2
• US Class Current: 365/185.19
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits

Abstract

When programming, for each programming pulse, a threshold voltage whose value is increased with respect to the previous programming pulse is applied to the gate terminal of each cell to be programmed. After an initial step, the increase of threshold voltage of the cell being programmed becomes equal to the applied gate voltage increase. In order to reduce the global programming time, keeping a small variability interval of threshold voltages associated with each level, to pass from a threshold level to a following one, each cell to be programmed is supplied with a plurality of consecutive pulses without verify, until it is immediately below the voltage level to be programmed, and then a verify step is performed, followed by subsequent programming and verify steps until the cell to be programmed reaches the desired threshold value.

Claims

1. A method for programming a plurality of non-volatile multi-level memory cells each having a gate terminal, comprising:

applying a set of programming pulses, wherein, upon every programming pulse, said gate terminal is supplied with a voltage whose value is increased with respect to the previous programming pulse;

cyclically applying a plurality of the programming pulses consecutively to the plurality of non-volatile memory cells in parallel without verifying the programming level of said cells;

performing a verify step to verify the level of programming of said cells after applying a plurality of consecutive programming pulses.

2. The method according to claim 1, wherein said plurality of pulses is equal to a nominal number of pulses necessary to take said cell from a current programming level to a following programming level.

3. The method according to claim 1, wherein, upon every programming pulse, said gate voltage shows a constant increase with respect to a previous programming pulse.

4. The method according to claim 3, wherein between a current programming pulse and a following programming pulse a threshold voltage difference is present, equal to a multiple, also not integer, of said constant increment, and in that said plurality of programming pulses is equal to an integer value obtained by truncating said multiple.

5. The method according to claim 4, wherein the threshold voltage steps between pairs of adjacent programming levels are of different values.

6. The method according to claim 1, wherein a first programming step starting from an erased state at a first programming level comprises a plurality of steps each including a programming step and a verify step.

7. The method according to claim 1, wherein said step of cyclically applying a plurality of consecutive programming pulses comprises:

detecting a first nominal number of programming pulses included between a current programming level and a following programming level;

calculating a number of programming pulses to be applied on the bias of said first nominal number of programming pulses supplying said number of programming pulses to be applied, without verify;

performing a verify step;

repeating the steps of supplying programming pulses and performing a verify step until at least one cell has reached the desired threshold value; and

repeating the steps of supplying programming pulses and performing a verify step until all cells have reached a desired threshold level.

8. The method according to claim 7, wherein said cycle of steps is repeated to a maximum programming level.

9. The method according to claim 7, wherein said number of programming pulses to be applied is equal to said first nominal number of programming pulses.

10. The method according to claim 7, wherein said step of repeating further comprises a step of stopping supplying the programming pulses to those cells to be programmed that have already reached said desired threshold value.

11. The method according to claim 7, wherein said step of calculating comprises the steps of:

checking whether there are cells to be programmed at said following programming level;

if so, setting said number of programming pulses to be applied equal to an integer value obtained by truncating said first nominal number of programming pulses;

if not, increasing a current level index, calculating a second nominal number of programming pulses included between said current programming level and a programming level subsequent to said current programming level;

summing said first and second nominal numbers of programming pulses; and

repeating said steps of verifying whether there are cells to be programmed at said following programming level, increasing a current level index, computing a second nominal number of programming pulses and summing until it is verified that there is at least one cell to be programmed at said following programming level;

finally, setting said number of programming pulses to be applied equal to an integer value obtained by truncating said second nominal number of programming pulses.

12. A method of global programming non-volatile, multi-level memory cells comprising:

applying a plurality of programming pulses to a selected plurality of memory cells without performing a verification of the threshold value programmed in the plurality of memory cells; and

verifing the threshold values programmed into the memory cells after completing said plurality of programming pulses.

13. The method according to claim 12, wherein said plurality of programming pulses is equal to a nominal number of pulses required to change said memory cell from a current memory level to a following memory level.

14. The method according to claim 13, wherein said current memory level and said following memory level are contiguous.

15. The method according to claim 13, wherein a value of change in the memory cell effected by one of said plurality of programming pulses is less than the margin between a minimum threshold value and a maximum threshold value of said following memory level.

16. The method according to claim 15, wherein said nominal number is the product of the difference between the maximum threshold value of said current memory level and the minimum threshold value of said following memory level divided by said value of change, truncated to the nearest integer.

17. The method according to claim 16, wherein said verify step is executed following said nominal number of pulses.

18. The method according to claim 17, wherein if the actual value of said memory cell is outside said minimum threshold level and said maximum threshold of said following memory level, an additional pulse is executed followed by an additional verify step.

19. A method of programming a plurality of multi-level memory cells in a repeated sequence of steps comprising:

detecting a first nominal number of programming pulses included between a current programming level and a following programming level;

calculating a number of programming pulses to be applied on the bias of said first nominal number of programming pulses

supplying said number of programming pulses to be applied in parallel to the plurality of memory cells, without verify;

performing a verify step;

repeating the steps of supplying a programming pulse and performing a verify step until at least one cell of the plurality of cells has reached the desired threshold value; and

repeating the steps of supplying a programming step and performing a verify step until the plurality of cells has reached a desired threshold level.